From 585f4d359accf68f3ce438e4d1a27105c6ddd62e Mon Sep 17 00:00:00 2001 From: Denis 'GNUtoo' Carikli Date: Wed, 29 Nov 2023 18:06:24 +0100 Subject: [PATCH] coreboot/i945 Thinkpads: replace dd commands with INTEL_ADD_TOP_SWAP_BOOTBLOCK It is possible to install GNU Boot on I945 Thinkpads without opening the computer even if the nonfree bios sets the bootblock region (the last 64K of the flash chip) read-only. The flash chip looks like that: +----- -----+---------------------------+-------------------------+ | ... | Secondary bootblock (64k) | Primary bootblock (64k) | +----- -----+---------------------------+-------------------------+ 0 0x1e0000 2MiB To bypass the read-only restriction we use an utility (bucts) that tells the hardware to swap the primary bootblock with the secondary one for the next boot. We then have to disable that swap and reflash again. CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK generates the two bootblocks directly in coreboot so we don't need to use special commands to do that anymore. In addition the MacBook 1.1 and 2.1 are known not to have such read-only restrictions so they don't need to have CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK enabled. Signed-off-by: Denis 'GNUtoo' Carikli Acked-by: Adrien 'neox' Bourmault --- .../coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb | 2 +- .../coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode | 2 +- .../coreboot/t60_intelgpu/config/libgfxinit_corebootfb | 2 +- resources/coreboot/t60_intelgpu/config/libgfxinit_txtmode | 2 +- resources/coreboot/x60/config/libgfxinit_corebootfb | 2 +- resources/coreboot/x60/config/libgfxinit_txtmode | 2 +- resources/coreboot/x60_16mb/config/libgfxinit_corebootfb | 2 +- resources/coreboot/x60_16mb/config/libgfxinit_txtmode | 2 +- resources/packages/roms_helper/boot | 6 ------ 9 files changed, 8 insertions(+), 14 deletions(-) diff --git a/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb index c7c517e..d2e6e2c 100644 --- a/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb +++ b/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb @@ -240,7 +240,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode index 4d74cb5..f0aa766 100644 --- a/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode +++ b/resources/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode @@ -240,7 +240,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/resources/coreboot/t60_intelgpu/config/libgfxinit_corebootfb index 791365c..27e64a1 100644 --- a/resources/coreboot/t60_intelgpu/config/libgfxinit_corebootfb +++ b/resources/coreboot/t60_intelgpu/config/libgfxinit_corebootfb @@ -240,7 +240,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/resources/coreboot/t60_intelgpu/config/libgfxinit_txtmode index 419cfa0..a67e48b 100644 --- a/resources/coreboot/t60_intelgpu/config/libgfxinit_txtmode +++ b/resources/coreboot/t60_intelgpu/config/libgfxinit_txtmode @@ -240,7 +240,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/x60/config/libgfxinit_corebootfb b/resources/coreboot/x60/config/libgfxinit_corebootfb index d5dc02d..ab5f112 100644 --- a/resources/coreboot/x60/config/libgfxinit_corebootfb +++ b/resources/coreboot/x60/config/libgfxinit_corebootfb @@ -242,7 +242,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/x60/config/libgfxinit_txtmode b/resources/coreboot/x60/config/libgfxinit_txtmode index 98b9d2f..9b1fe61 100644 --- a/resources/coreboot/x60/config/libgfxinit_txtmode +++ b/resources/coreboot/x60/config/libgfxinit_txtmode @@ -242,7 +242,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/x60_16mb/config/libgfxinit_corebootfb b/resources/coreboot/x60_16mb/config/libgfxinit_corebootfb index 4cbfecc..5c52004 100644 --- a/resources/coreboot/x60_16mb/config/libgfxinit_corebootfb +++ b/resources/coreboot/x60_16mb/config/libgfxinit_corebootfb @@ -242,7 +242,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/coreboot/x60_16mb/config/libgfxinit_txtmode b/resources/coreboot/x60_16mb/config/libgfxinit_txtmode index c155f83..be97a06 100644 --- a/resources/coreboot/x60_16mb/config/libgfxinit_txtmode +++ b/resources/coreboot/x60_16mb/config/libgfxinit_txtmode @@ -242,7 +242,7 @@ CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 # diff --git a/resources/packages/roms_helper/boot b/resources/packages/roms_helper/boot index a6b6431..4aa6c96 100755 --- a/resources/packages/roms_helper/boot +++ b/resources/packages/roms_helper/boot @@ -252,12 +252,6 @@ moverom() { dd if=descriptors/ich9m/ich9fdnogbe_${romsize}m.bin of=${newrompath} bs=1 count=4k conv=notrunc fi done - - if [ "${cuttype}" = "i945 laptop" ]; then - dd if=${newrompath} of=top64k.bin bs=1 skip=$[$(stat -c %s ${newrompath}) - 0x10000] count=64k - dd if=top64k.bin of=${newrompath} bs=1 seek=$[$(stat -c %s ${newrompath}) - 0x20000] count=64k conv=notrunc - rm -f top64k.bin - fi } # expected: configs must not specify a payload