Commit Graph

51 Commits

Author SHA1 Message Date
Adrien Bourmault 56c59af861
packages: roms_helper: boot: add support for debug configuration
When a computer does not boot at all or the result is only a deep black screen,
a very useful option can be to use a serial connector to get UART debug console
and read it, looking for any useful hint. However, enabling UART debug console
with a sufficient level of details slows down the boot process in most cases.

This commit adds the capability to build debug images, using a special
configuration file for coreboot with debug options. This is a simplistic way
that works for now, but should be improved later on.

These debug images will be generated in the bin-dbg/ directory instead
of bin/ where regular images are located.

Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
2024-12-07 13:51:20 +01:00
Denis 'GNUtoo' Carikli 05c09293d9
coreboot: blobs.list: fam15h: remove F12NbSmuFirmware.h
While the FAM12H SMU firmware is under a free license, as the
F12NbSmuFirmware.h contains the following copyright header:
     * Copyright (c) 2011, Advanced Micro Devices, Inc.
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions are met:
     *     * Redistributions of source code must retain the above copyright
     *       notice, this list of conditions and the following disclaimer.
     *     * Redistributions in binary form must reproduce the above copyright
     *       notice, this list of conditions and the following disclaimer in the
     *       documentation and/or other materials provided with the distribution.
     *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
     *       its contributors may be used to endorse or promote products derived
     *       from this software without specific prior written permission.
we also lack the corresponding source code.

Since AMD Family 12H was removed upstream, and that GNU Boot doesn't
support any computers with this CPU family, it's easier to remove the
file than to try to fix the issue in some other way.

Reported-by: Leah Rowe <info@minifree.org>
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien Bourmault <neox@gnu.org>
2024-11-12 12:17:09 +01:00
Denis 'GNUtoo' Carikli 3f365ac849
blobs.list: coreboot: fam15h: remove minnowmax_{1,2}gb.absf.
The file contains the following copyright header:
    // This file contains an 'Intel Peripheral Driver' and is
    // licensed for Intel CPUs and chipsets under the terms of your
    // license agreement with Intel or your vendor. [...]
    [...]
    // Copyright (c) 2010-2013 Intel Corporation. All rights reserved
    // This software and associated documentation (if any) is furnished
    // under a license and may only be used or copied in accordance
    // with the terms of the license. Except as permitted by such
    // license, no part of this software or documentation may be
    // reproduced, stored in a retrieval system, or transmitted in any
    // form or by any means without the express written consent of
    // Intel Corporation.

While there is also many contradicting statements like this one in
src/soc/intel/fsp_baytrail/Kconfig:
    ## This file is part of the coreboot project.
    ##
    ## Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
    ## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
    ##
    ## This program is free software; you can redistribute it and/or modify
    ## it under the terms of the GNU General Public License as published by
    ## the Free Software Foundation; version 2 of the License.
    ##
    ## This program is distributed in the hope that it will be useful,
    ## but WITHOUT ANY WARRANTY; without even the implied warranty of
    ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    ## GNU General Public License for more details.

The baytrail FSP was added in Coreboot by the commit
954f3882f1ea8512de9a5a6a38569c36bffae405 ("Add the Bay Trail FSP
include & srx directories") by Martin Roth, proably not on behalf on
Intel.

The commit also contains an email address from Martin Roth with the
se-eng.com domain (from Sage Electronic Engineering) and doesn't
contain any email address related to Intel. This increase the
probability that Intel wasn't involved in adding the Bay Trail FSP to
Coreboot.

Because of the (strong) doubts, the fact that the Bay Trail FSP was
also removed upstream and that GNU Boot doesn't support computers with
Intel Bay Trail, it's easier to just remove the nonfree software.

Reported-by: Leah Rowe <info@minifree.org>
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien Bourmault <neox@gnu.org>
2024-11-12 12:17:06 +01:00
Denis 'GNUtoo' Carikli 343515aee7
coreboot: blobs.list: arm-trusted-firmware: Remove RK3399 hdcp.bin firmware.
This was introduced in ARM trusted firmware in the commit
c76631c52b0b1550ff182c177555485700274314 ("rockchip: include hdcp.bin
and declare hdcp key decryption handler").

The hdcp.bin file contains code as it is included inside one of the
arm-trusted-firmware drivers with the following code:
    __asm__(
           ".pushsection .text.hdcp_handler, \"ax\", %progbits\n"
           ".global hdcp_handler\n"
           ".balign 4\n"
           "hdcp_handler:\n"
           ".incbin \"" __XSTRING(HDCPFW) "\"\n"
           ".type hdcp_handler, %function\n"
           ".size hdcp_handler, .- hdcp_handler\n"
           ".popsection\n"
    );

The same file that contains the above code has the following copyright header:
    * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
    *
    * SPDX-License-Identifier: BSD-3-Clause

This conflicts with the message of the commit mentioned above:
    For some reason, HDCP key decrytion can't open source in ATF, so we
    build it as hdcp.bin. Besides declare the handler for decrypting.
and we also have missing corresponding source code.

Because of the lack of source code, and the fact that GNU Boot doesn't
support computers with RK3399 yet, it's easier to remove the hdcp.bin
firmware than to pursue other ways to fix the issue.

Reported-by: Leah Rowe <info@minifree.org>
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
neox: fixed "file file" typo in commit message
Acked-by: Adrien Bourmault <neox@gnu.org>
2024-11-12 12:17:03 +01:00
Denis 'GNUtoo' Carikli a202dce646
images: remove 'libgfxinit' from the image names.
The build system was designed to produce images with different GPU
drivers for a single computer and/or to show the image name in the
final image names, to enable users to know which GPU driver was used.

However since all boards have practically speaking the same GPU driver
('libgfxinit') this adds too much complexity for almost no benefits.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2024-10-05 11:37:59 +02:00
Denis 'GNUtoo' Carikli bcb729a8aa
coreboot: blobs.list: remove nonfree vboot futility test data.
The test data consists mostly in nonfree boot firmware images. The
images contain nonfree binaries like for instance microcode updates
without complete and corresponding source code.

As more and more boot firmware images are added over time it's a good
idea to just remove everything in that directory to make sure that we
don't ship nonfree software from that directory again, while also
lowering the maintenance costs.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2024-09-09 17:33:54 +02:00
Adrien Bourmault c18e78555d
ressources/coreboot/fam15h*: fix building crossgcc 8.3.0 (fixes #64870)
This commit fixes an error encountered on Trisquel 11 while trying to
build the fam15h coreboot crossgcc 8.3.0:

In file included from /usr/include/signal.h:328,
                 from /usr/include/x86_64-linux-gnu/sys/param.h:28,
                 from ../../gcc-8.3.0/gcc/system.h:298,
                 from ../../gcc-8.3.0/gcc/ada/init.c:65:
../../gcc-8.3.0/gcc/ada/init.c:575:18: error: missing binary operator before token "("
  575 | # if 16 * 1024 < MINSIGSTKSZ
      |                  ^~~~~~~~~~~
make[1]: *** [Makefile:1110 : ada/init.o] Erreur 1

The changes of the GLIBC that removed the MINSKTSZ constant was
introduced only for systems using the Linux kernel, and while the
changelog is recommanding using sysconf to get the value of
`_SC_MINSTKSZ`. The problem is that it does not allow to get the value
in the preprocessor context.

This error has been corrected on upstream GCC by Eric Botcazou <ebotcazou@adacore.com>
but this was not applied on upstream coreboot (even 4.11 branch).
It has been accepted by GCC and the bug report has been set as RESOLVED
FIXED, meaning it solved the bug.

The MINSTKSZ patch is needed for all GCC versions from 8 to 9, since this
commit solved the bug for 9, 10 and later versions. It has been adopted
by OpenSUSE for its GCC 8 package:
https://build.opensuse.org/projects/devel:gcc/packages/gcc8/files/gcc8-ada-MINSTKSZ.patch

Here's the corresponding patch header (in debian's format:
https://dep-team.pages.debian.net/deps/dep3/):
    Origin: upstream, https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=a5a7cdcaa0c29ee547c41d24f495e9694a6fe7f1
    Bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99264
    Bug-GNU Boot: https://savannah.gnu.org/bugs/?64870

The MINSTKSZ patch added by this commit is unmodified from the
OpenSUSE one mentioned above, and the OpenSUSE patch is probably a
backport of the upstream GCC patch as there is not difference in what
it does.

Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
GNUtoo: small formatting of the commit message + last paragraph.
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
2024-09-09 16:05:14 +02:00
Denis 'GNUtoo' Carikli 585f4d359a
coreboot/i945 Thinkpads: replace dd commands with INTEL_ADD_TOP_SWAP_BOOTBLOCK
It is possible to install GNU Boot on I945 Thinkpads without opening
the computer even if the nonfree bios sets the bootblock region (the
last 64K of the flash chip) read-only.

The flash chip looks like that:
+-----   -----+---------------------------+-------------------------+
|     ...     | Secondary bootblock (64k) | Primary bootblock (64k) |
+-----   -----+---------------------------+-------------------------+
0      0x1e0000                                                  2MiB

To bypass the read-only restriction we use an utility (bucts) that
tells the hardware to swap the primary bootblock with the secondary
one for the next boot. We then have to disable that swap and reflash
again.

CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK generates the two bootblocks
directly in coreboot so we don't need to use special commands to do
that anymore.

In addition the MacBook 1.1 and 2.1 are known not to have such
read-only restrictions so they don't need to have
CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK enabled.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-12-06 17:32:36 +01:00
Denis 'GNUtoo' Carikli 0a2448480f
coreboot/fam15h: Remove nonfree microcode (missing source code).
While that microcode is licensed under a permissive free software
license we don't have any corresponding source code, so until someone
produces that source code we need to treat it as nonfree software.

This issue was introduced by the commit the
f7c0fec698 ("coreboot/fam15h: update
code base, deblob, unset CONFIG_STM (see bug #64535)") and is also
present in GNU Boot 0.1 RC1.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-12-06 16:02:07 +01:00
Denis 'GNUtoo' Carikli b8d22803ed
coreboot: blobs.list: sort files alphabetically.
The files were sorted with the sort command.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-12-06 16:01:17 +01:00
Denis 'GNUtoo' Carikli e9948c1202
computers: add QEMU PC.
The configuration is based on the one in resources/coreboot/x60/.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-12-06 16:00:15 +01:00
Denis 'GNUtoo' Carikli 6da6d7fa64
coreboot: Remove CONFIG_USE_BLOBS=y.
In coreboot this build option is used to download nonfree software so
they can be included later on in the builds.

It doesn't necessarily means that nonfree software ends up in the
images but it is way easier and safer to disable that than having to
audit precisely what happen for each computer and build configuration.

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Full build tested on PureOS.
Tested-by: Adrien 'neox' Bourmault <neox@gnu.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-12-06 15:57:33 +01:00
Adrien Bourmault 58b8e09526
coreboot/fam15h: don't build ada toolchain for generic platforms
These folders (fam15h_rdimm and fam15h_udimm) are generic plateforms to gather
patches in common for multiple boards (e.g. kgpe-16 and kcma-d8), this is why we also
disable crossgcc_ada in the configuration, since it will be built by specific boards
if needed, avoiding double compilation.

Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
GNUtoo: split commit
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-08-22 21:16:19 +02:00
Adrien Bourmault f7c0fec698
coreboot/fam15h: update code base, deblob, unset CONFIG_STM (see bug #64535)
This commit updates the coreboot code base from release 4.11 to 4.11_branch for kgpe-d16,
kcma-d8, kfsn4-dre and addresses one new blob related to this update.

The main reason to update the codebase is to prevent a bug with RAM initialization
that occured with coreboot 4.11 and raised the following critical error:

	fam15_receiver_enable_training_seed: using seed: 0054
	fam15_receiver_enable_training_seed: using seed: 0054
	TrainRcvrEn: Status 2005
	TrainRcvrEn: ErrStatus 4000
	TrainRcvrEn: ErrCode 0
	TrainRcvrEn: Done

	TrainDQSReceiverEnCyc_D_Fam15: lane 0 failed to train!  Training for receiver 2 on DCT 0 aborted
	TrainDQSReceiverEnCyc: Status 2205
	TrainDQSReceiverEnCyc: TrainErrors 44000
	TrainDQSReceiverEnCyc: ErrStatus 44000
	TrainDQSReceiverEnCyc: ErrCode 0
	TrainDQSReceiverEnCyc: Done

	TrainDQSReceiverEnCyc: Status 2005
	TrainDQSReceiverEnCyc: TrainErrors 4000
	TrainDQSReceiverEnCyc: ErrStatus 4000
	TrainDQSReceiverEnCyc: ErrCode 0
	TrainDQSReceiverEnCyc: Done

	DIMM training FAILED!  Restarting system...soft_reset() called!

This coreboot revision also correct some bugs with SMM, SMBIOS, IPMI and BMC.

Some new values in coreboot configuration make coreboot first build stop to prompt
users and forcing them to choose an option to continue:
	- CONFIG_STM
	- CONFIG_DEBUG_IPMI
	- CONFIG_VENDOR_VIA
	- CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
	- CONFIG_IPMI_FRU_SINGLE_RW_SZ
	- CONFIG_IPMI_KCS_TIMEOUT_MS

A bug has been opened about CONFIG_STM on our bug tracker [1], and we decided,
for now, to unset this option explicitely.

So in this commit we just regenerated configurations for each fam15h board via
coreboot build prompts and copied the resulting configurations in the configuration
folder and that results in the following:
	- unset CONFIG_STM
	- unset CONFIG_DEBUG_IPMI
	- unset CONFIG_VENDOR_VIA
	- unset CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
	- set CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
	- set CONFIG_IPMI_KCS_TIMEOUT_MS=5000

[1]https://savannah.gnu.org/bugs/?64535

Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
GNUtoo: split commit into "don't build ada toolchain for generic platforms"
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-08-22 21:15:39 +02:00
Adrien Bourmault de9297fc89
coreboot/fam15h: fix crossgcc acpica build on newer hostcc
With newer hostcc, trying to build IASL will raise an error:
    -  Intermediate obj/aslcompilerlex.c
    - Link obj/iasl
    /usr/bin/ld: obj/aslcompilerparse.o:(.bss+0x8): multiple
    definition of `AslCompilerlval'; obj/aslcompilerlex.o:(.bss+0x0):
    first defined here
    /usr/bin/ld: obj/prparserlex.o:(.bss+0x0): multiple definition of
    `LexBuffer'; obj/dtparserlex.o:(.bss+0x0): first defined here
    collect2: error: ld returned 1 exit status

This commit adds a patch for GCC 8.3.0 that modifies the ASL engine:
    - making LuxBuffer variable static to avoid multiple definitions
      being treated as errors
    - removing a redundant definition of AcpiGbl_DbOpt_NoRegionSupport

Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
GNUtoo: commit: cosmetics changes only
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-08-22 21:15:09 +02:00
Adrien Bourmault c38348dbb5
coreboot/fam15h: fix for gcc/gnat building
With newer hostcc, trying to build GCC 8.3.0 will raise an error from ld:

	undefined reference to `__gnat_begin_handler_v1'

This commit adds a patch for GCC found on coreboot [1] correcting this
error by backporting the GNAT exception handler v1 to GCC 8.3.0 allowing
GNAT to be built with newer hostcc like GCC 10+.

[1]https://review.coreboot.org/c/coreboot/+/42158

Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
2023-08-22 21:15:00 +02:00
Adrien Bourmault 0d77d99d23
coreboot/fam15h: fixing binutils not building properly
Without that fix, if we build for a fam15h target on PureOS byzantium,
we have a build failure:

	$ ./build boot roms kgpe-d16-udimm_2mb
	  [...]
	  Building MPC v1.1.0 for host ... ok
	  Building BINUTILS v2.32 for target ... failed. Check 'build-i386-elf-BINUTILS/build.log
	  make[2]: *** [Makefile:26: build_gcc] Error 1
	  make[1]: *** [Makefile:51: build-i386] Error 2
	  make: *** [util/crossgcc/Makefile.inc:48: crossgcc-i386] Error 2
	  Error: build/roms: something went wrong

Then the build log (here) in available in
coreboot/fam15h_udimm/util/crossgcc/build-i386-elf-BINUTILS/build.log
has the following:
	In file included from ../../binutils-2.32/gold/debug.h:29,
        	         from ../../binutils-2.32/gold/descriptors.cc:31:
	../../binutils-2.32/gold/errors.h:87:50: error:
	'string' in namespace 'std' does not name a type
	   87 |   undefined_symbol(const Symbol* sym, const std::string& location);
	      |                                                  ^~~~~~
	../../binutils-2.32/gold/errors.h:29:1: note: 'std::string'
	is defined in header '<string>'; did you forget to '#include <string>'?
	   28 | #include "gold-threads.h"
	  +++ |+#include <string>
	   29 |

Signed-off-by: Adrien Bourmault <neox@a-lec.org>
GNUtoo: commit message but not its title
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-08-22 21:14:49 +02:00
Denis 'GNUtoo' Carikli b77307995a
coreboot/default, coreboot/fam15h: use GNU mirror for acpica
Crossgcc needs acpica-unix2-20210331.tar.gz and acpica-unix2-20190703.tar.gz,
but this file is gone from upstream[1], so with guix-time-machine and
guix build --source, we recovered these files and published it at the addresses
in the patches.

[1]https://github.com/acpica/acpica/issues/883

Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Co-developed-by: Adrien 'neox' Bourmault <neox@gnu.org>
Signed-off-by: Adrien 'neox' Bourmault <neox@gnu.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
neox: Added fam15h patches and adjusted the commit message accordingly
Acked-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Adrien 'neox' Bourmault <neox@gnu.org>
2023-08-22 21:14:24 +02:00
Leah Rowe 8ca0761fb0 specifically call python3, in scripts
with this change, it's unlikely we'll hit errors again. previously,
some projects used were calling "python" which in context was
python3, but on some setups, the user only has python2 and python3
but no symlink for "python" (which if exists, we assumed linked to
python3)

now it's unambiguous. docs/build/ can probably be updated now, as
a result of this change, to remove the advice about that
2022-03-13 18:17:09 +00:00
Leah Rowe babce03fbd coreboot/*: set grub_scan_disk to ahci on most boards
on ga-g41m-es2l, set it to ata
2021-12-29 07:18:21 +00:00
Leah Rowe 5d65d6c3d3 apple/macbook21: set grub_scan_disk to ahci 2021-12-29 07:14:22 +00:00
Leah Rowe 7221782940 lenovo/r400: disable death beeps 2021-12-20 02:46:25 +00:00
Leah Rowe dbe4a0c6a3 coreboot configs: don't enable wifi during early init 2021-12-11 15:24:42 +00:00
Leah Rowe f20160f3bb coreboot configs: disable serial output during coreboot initialization 2021-12-11 15:00:17 +00:00
Leah Rowe 7db63c2685 macbook21_16mb: always clear DRAM on regular boot 2021-12-07 21:36:32 +00:00
Vitali64 4c8518899a Add macbook*1 16mb configs 2021-12-07 18:51:49 +00:00
Leah Rowe 9938fa14b1 Fix broken SpeedStep on GM45 laptops such as ThinkPad X200, T400, T500, W500
Coreboot is enabling PECI on these CPUs which, according to Intel erratum, must
only be done after loading microcode updates, otherwise the CPUID feature set
becomes corrupted. That's my understanding, and I think this is why SpeedStep
is broken. To be specific, it could but but operating systems no longer detect
that the feature is supported. In any case, belgin on IRC found the commit in
coreboot, after a bisect, enabling PECI. This commit in Libreboot adds a patch,
reverting coreboot's PECI patch.
2021-12-01 04:32:02 +00:00
Leah Rowe eed25bd220 update coreboot and nuke tianocore
tianocore is a liability for the libreboot project. it's a bloated mess, and
unreliable, broken on many boards, and basically impossible to audit.

i don't trust tianocore, so i'm removing it.
2021-11-22 10:03:50 +00:00
Leah Rowe 7e6bec17ef build/roms: add g43t-am3_16mb config 2021-11-01 09:53:34 +00:00
Leah Rowe 71ebf7e863 build/roms: add d945gclf_16mb 2021-11-01 07:15:27 +00:00
Leah Rowe 93c957ddb6 build/roms: add 16mb d510mo config
you must de-solder the default chip and install the new one.
winbond w25q128fvsig is a nice choice of 16MB (128Mbit) IC
2021-11-01 06:45:15 +00:00
Leah Rowe 6d23b3fe55 Include memtest86+ on setups where this is practical 2021-11-01 04:04:56 +00:00
Leah Rowe cca23ac713 nuke d8/d16 configs for 4mb/8mb setups. only have 2mb and 16mb configs
4mb and 8mb users can just pad their roms to 16mb, using the instructions on
<https://libreboot.org/faq.html#how-do-i-pad-a-rom-before-flashing>

maintaining them in lbmk is a waste of time, and also a hazard because it's a
lot of duplicated labour when making any changes, which could result in awful
mistakes being made
2021-11-01 02:37:55 +00:00
Leah Rowe f89d85dd90 build/boot/roms: add t60_16mb_intelgpu configs 2021-11-01 01:56:32 +00:00
Leah Rowe b4fa5cdd01 build/boot/roms: add x60_16mb configs 2021-11-01 01:52:35 +00:00
Leah Rowe c2720c58e7 lenovo/t400: Enable all SATA ports (add persmule's patch)
See:
<https://lists.nongnu.org/archive/html/libreboot/2016-08/msg00063.html>

This enables all SATA ports, allowing full T400s compatibility. T400s already
works just fine, when flashing a T400 ROM, but not all SATA ports were usable.

The specific patch is here:
<https://lists.nongnu.org/archive/html/libreboot/2016-08/txtgT_L8DC94R.txt>

There was also this patch, which coreboot actually adapted upstream:
<https://lists.nongnu.org/archive/html/libreboot/2016-08/txtMXyws85Q_P.txt>

Yes, this patch was submitted in 2016. I overlooked it, during all this time.
2021-10-31 23:36:47 +00:00
Leah Rowe 62fa042a17 re-add grub backgrounds and update grub. mitigate missing characters
mitigate missing characters in unifont for border/arrow characters. this saves
space because now it is no longer necessary to add a custom font

the background added has the libreboot logo on it, and it's 10kb in size unlike
the old gnulove background that was hundreds of KB
2021-10-31 07:13:46 +00:00
Leah Rowe 49198fe3d1 Disable PIKE2008 option ROM loading on KGPE-D16/KCMA-D8
These option ROMs are known to cause a system hang. If you insert an empty
option ROM into CBFS, it disables any option ROM loading for those devices
when using SeaBIOS.
2021-10-30 21:22:27 +01:00
Leah Rowe 651a3f05fd update to coreboot master on macbook21, and add vitali64's cstate 3 patch
improved battery life on macbook21
2021-10-30 19:19:31 +01:00
Leah Rowe 777316eb4f coreboot/default: Fix Werror when building ThinkPad T400 images 2021-08-23 10:34:56 +01:00
Leah Rowe 4b7be66596 coreboot: revert cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR
This fixes issue 3:
https://notabug.org/libreboot/lbmk/issues/3

In this issue, GM45 laptops such as X200/T400 will hang on reboot (normal boot
works, and shutting down works too).
2021-08-23 09:31:56 +01:00
Leah Rowe 85ec4e0e08 board/x301: add new board
similar to x200
2021-05-22 20:19:45 +01:00
Leah Rowe cba1e5bf3c board/d945gclf/cfg: re-do config 2021-05-22 20:03:27 +01:00
Leah Rowe 911bd74495 board/d510mo/cfg: re-do config 2021-05-22 20:00:04 +01:00
Leah Rowe 3db7b791d6 board/d510mo/cfg: enable payload_grub_withseabios 2021-05-22 19:59:58 +01:00
Leah Rowe 1d1d069bdc board/kfsn4-dre/cfg: re-do config. 1mb and 2mb roms available
libgfxinit_txtmode with seabios only
2021-05-22 19:53:02 +01:00
Leah Rowe 5c5e3baf92 board/g43t-am3/cfg: re-do configs. libgfxinit_txtmode only
For add-on GPU, use one of the SeaBIOS images.
2021-05-22 19:39:57 +01:00
Leah Rowe 943e1afd6b board/ga-g41m-es2l/cfg: re-do config. libgfxinit_txtmode only
Use seabios ROM if you want to use an add-on GPU.
seabios_withgrub and seabios_grubfirst are also available.
2021-05-22 19:31:35 +01:00
Leah Rowe 43dd4d5446 board/ga-g41m-es2l/cfg: enable payload_grub_withseabios
SeaBIOS should fit nicely, now that memtest is disabled
2021-05-22 19:31:25 +01:00
Leah Rowe cfd47cc0a5 build/roms: re-do KCMA-D8 and KGPE-D16 configs
2MiB and 16MiB were the only flash sizes supported. 4 and 8MiB have been
added.

Now there are only libgfxinit_txtmode configs.

Use seabios_withgrub or seabios_grubfirst ROMs if you wish to use an add-on
GPU.
2021-05-22 18:39:51 +01:00