Add more explanation on resident components
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@ -793,7 +793,7 @@
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study on the 4.11 version of \textit{coreboot} \cite{coreboot_4_11},
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study on the 4.11 version of \textit{coreboot} \cite{coreboot_4_11},
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which is the last version that supported the ASUS KGPE-D16 mainboard. \\
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which is the last version that supported the ASUS KGPE-D16 mainboard. \\
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For the firmware tasks to be done efficiently, \textit{coreboot} is
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For the initialization tasks to be done efficiently, \textit{coreboot} is
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organized in different stages (fig. \ref{fig:coreboot_stages})
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organized in different stages (fig. \ref{fig:coreboot_stages})
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\cite{coreboot_docs}.
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\cite{coreboot_docs}.
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to the appropriate CPUs. Additionally, the firmware configures the
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to the appropriate CPUs. Additionally, the firmware configures the
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HyperTransport (HT) technology, a high-speed communication protocol
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HyperTransport (HT) technology, a high-speed communication protocol
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that facilitates data exchange between the processor and the
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that facilitates data exchange between the processor and the
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northbridge, ensuring smooth data flow between these components. \\
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northbridge, ensuring smooth data flow between these components.
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During this stage, microcode patches may be loaded into CPU and
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remain resident, settings related to memory controllers and CPU
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too. \\
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The \textit{romstage} begins with a call to the
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The \textit{romstage} begins with a call to the
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\path{_start} function, defined in
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\path{_start} function, defined in
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@ -1153,8 +1156,13 @@
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x86), coreboot tables, and updates to the device tree (specific to
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x86), coreboot tables, and updates to the device tree (specific to
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ARM). Additionally, the ramstage locks down the hardware and
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ARM). Additionally, the ramstage locks down the hardware and
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firmware by applying write protection to boot media, locking
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firmware by applying write protection to boot media, locking
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security-related registers, and locking SMM (specific to x86)
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security-related registers, and locking SMM (specific to x86),
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\cite{coreboot_docs}.
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which is a resident component in a protected area.
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\cite{coreboot_docs}. CBMEM data structures (like coreboot tables,
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memory map, etc.) are populated during this stage and left resident
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for the OS or payload to access, same for SMBIOS tables, ACPI tables
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and eventually option ROMS. \\
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Effective resource allocation is essential for system stability,
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Effective resource allocation is essential for system stability,
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particularly in complex configurations involving multiple CPUs
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particularly in complex configurations involving multiple CPUs
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and peripherals. This stage manages initial resource allocation,
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and peripherals. This stage manages initial resource allocation,
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@ -1179,7 +1187,9 @@
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At its core,
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At its core,
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ACPI is implemented through a series of data structures and
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ACPI is implemented through a series of data structures and
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executable code known as ACPI tables, which are provided by the
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executable code known as ACPI tables, which are provided by the
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system firmware and interpreted by the OS. These tables describe
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system firmware and interpreted by the OS at runtime. It means
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that these are components from the firmware that remain resident
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while the OS runs. These tables describe
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various aspects of the system, including hardware resources,
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various aspects of the system, including hardware resources,
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device power states, and thermal zones. The ACPI Specification
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device power states, and thermal zones. The ACPI Specification
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outlines these structures and provides the necessary
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outlines these structures and provides the necessary
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@ -1229,7 +1239,8 @@
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applications. Introduced by Intel, SMM operates in an
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applications. Introduced by Intel, SMM operates in an
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environment separate from the main operating system, offering a
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environment separate from the main operating system, offering a
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controlled space for executing sensitive operations
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controlled space for executing sensitive operations
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\cite{uefi_smm_security}. \\
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\cite{uefi_smm_security}. This is another firmware component
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that remains resident while the OS runs. \\
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SMM is triggered by a System Management Interrupt (SMI), which
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SMM is triggered by a System Management Interrupt (SMI), which
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is a non-maskable interrupt that causes the CPU to save its
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is a non-maskable interrupt that causes the CPU to save its
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BIOS routines used in legacy BIOS systems. With GOP drivers,
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BIOS routines used in legacy BIOS systems. With GOP drivers,
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the system can initialize the GPU and display a graphical interface
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the system can initialize the GPU and display a graphical interface
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even before the operating system loads \cite{osdev_gop}.
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even before the operating system loads \cite{osdev_gop}.
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These are other examples of resident firmware components while the
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OS is running. \\
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Hardware manufacturers can distribute proprietary UEFI drivers as
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Hardware manufacturers can distribute proprietary UEFI drivers as
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part of firmware updates, making it straightforward for end-users
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part of firmware updates, making it straightforward for end-users
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to install and use them. This is especially useful for specialized
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to install and use them. This is especially useful for specialized
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@ -1326,7 +1339,7 @@
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free software community. It also gives hardware vendors more control
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free software community. It also gives hardware vendors more control
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over how their devices are initialized and used, which can be
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over how their devices are initialized and used, which can be
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an advantage for vendors but is a freedom and user control
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an advantage for vendors but is a freedom and user control
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limitation. \\
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limitation.
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Payloads are then definitely important parts of the firmware.
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Payloads are then definitely important parts of the firmware.
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