diff --git a/hardware_init_review.pdf b/hardware_init_review.pdf index 65fb367..d871b7f 100644 Binary files a/hardware_init_review.pdf and b/hardware_init_review.pdf differ diff --git a/hardware_init_review.tex b/hardware_init_review.tex index c18d9ba..b560a02 100644 --- a/hardware_init_review.tex +++ b/hardware_init_review.tex @@ -37,21 +37,25 @@ \setcounter{page}{2} \vspace*{\fill} % fill the page so that text is at the bottom - This is Edition 0.1. \\ + This is Edition 0.2. \\ - Copyright (C) 2024 Adrien 'neox' Bourmault + Copyright \copyright\ 2024 Adrien 'neox' Bourmault \href{mailto:neox@gnu.org}{} \\ Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; - with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + with the Invariant Sections being "GNU General Public License version 2" + and "GNU Free Documentation License", with no Front-Cover Texts, and no + Back-Cover Texts. A copy of the license is included in the section entitled "GNU - Free Documentation License". + Free Documentation License". \\ Source-code included in this document is licensed under the GNU General - Public License version 2 or later. You can find a copy of this license - at . + Public License version 2 or any later version published by the + Free Software Foundation. + A copy of the license is included in the section entitled "GNU + General Public License version 2". \\ \newpage @@ -59,7 +63,7 @@ % ACKNOWLEDGMENTS % ------------------------------------------------------------------------------ \chapter*{Acknowledgments} -\addcontentsline{toc}{chapter}{Acknowledgments}} +\addcontentsline{toc}{chapter}{Acknowledgments} First and foremost, I would like to express my deep gratitude to Marie-Minerve Louërat, without whom @@ -78,9 +82,9 @@ Zoë Kooymann and Ian Kelling for their dedication in securing this funding and for their kindness throughout all the procedures. \\ - I am deeply grateful to Denis Carikli (GNUtoo), my fellow maintainer of - GNU Boot, for his meticulous reviews, emotional support, and brilliant ideas - that enriched this work, and to Richard M. Stallman for his advice and + I am deeply grateful to Denis Carikli (GNUtoo), my fellow GNU Boot + co-maintainer, for his meticulous reviews, emotional support, and brilliant + ideas that enriched this work, and to Richard M. Stallman for his advice and support throughout this journey. \\ A big thank you to Manuel Bouyer for his infinite patience with all my @@ -146,17 +150,21 @@ % ------------------------------------------------------------------------------ % Table of contents % ------------------------------------------------------------------------------ +\chapter*{\vspace{-\cftbeforechapskip}} +\addcontentsline{toc}{chapter}{Contents} \tableofcontents \newpage % List of figures +\chapter*{\vspace{-\cftbeforechapskip}} \addcontentsline{toc}{chapter}{List of Figures} \listoffigures \newpage -% List of figures -\addcontentsline{toc}{chapter}{List of Listings} +% List of listings +%\chapter*{\vspace{-3em}} \listoflistings +\addcontentsline{toc}{chapter}{List of Listings} \newpage % ------------------------------------------------------------------------------ @@ -1408,7 +1416,7 @@ % ------------------------------------------------------------------------------ \chapter{Memory initialization and training} - \section{Importance of DDR3 Memory Initialization} + \section{Importance of DDR3 memory initialization} Memory modules are designed solely for storing data. The only valid operations on a memory device are reading data stored in the device, @@ -2256,18 +2264,6 @@ verified with checksums. \end{itemize} - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_1.c} - \end{adjustwidth} - \caption{ - Beginning of - \protect\path{mctAutoInitMCT_D()}, extract from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_1} - \end{listing} - The memory controller for the BSP is queried to check if it can manage ECC memory, which is a type of memory that includes error-correcting code to detect and correct common types of data @@ -2298,30 +2294,6 @@ (lst. \ref{lst:mctAutoInitMCT_D_3}). The ZQ calibration is triggered at this stage. \\ - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_2.c} - \end{adjustwidth} - \caption{ - DIMM initialization in - \protect\path{mctAutoInitMCT_D()}, extract from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_2} - \end{listing} - - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_3.c} - \end{adjustwidth} - \caption{ - Voltage control in - \protect\path{mctAutoInitMCT_D()}, extract from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_3} - \end{listing} - Now, present memory modules are detected using \path{mct_initDCT} (lst. \ref{lst:mctAutoInitMCT_D_4}). The memory modules existence is checked and the machine halts immediately after displaying a @@ -2343,30 +2315,6 @@ The external northbridge is notified of this new memory configuration. \\ - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_fixme.c} - \end{adjustwidth} - \caption{ - \protect\path{mctAutoInitMCT_D()} does not allow restoring - previous training values, extract from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_fixme} - \end{listing} - - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_4.c} - \end{adjustwidth} - \caption{ - Preparing SMBus, DCTs and NB in - \protect\path{mctAutoInitMCT_D()} from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_4} - \end{listing} - The \textit{coreboot} code compensates for the delay between DQS and DQ signals, as well as between CMD and DQ. This is handled by the \path{DQSTiming_D} function (lst. \ref{lst:mctAutoInitMCT_D_5}). @@ -2374,36 +2322,11 @@ the channels and nodes are interleaved and ECC is enabled (if supported by every module). \\ - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_5.c} - \end{adjustwidth} - \caption{ - Get DQS, reset and activate ECC in - \protect\path{mctAutoInitMCT_D()} from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_5} - \end{listing} - After that being done, the DRAM can be mapped into the address space with cacheability, and the init process finishes with validation of every populated DCT node (lst. \ref{lst:mctAutoInitMCT_D_6}). \\ - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \inputminted{c}{ - listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_6.c} - \end{adjustwidth} - \caption{ - Mapping DRAM with cache, validating DCT nodes - and finishing the init process in - \protect\path{mctAutoInitMCT_D()} from - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:mctAutoInitMCT_D_6} - \end{listing} - Finally, if the RAM is of the ECC type, error-correcting codes are enabled, and the function ends by activating power-saving features if requested by the user. \\ @@ -2580,69 +2503,6 @@ if (nv_DQSTrainCTL) { \label{lst:dqs_training_process} \end{listing} - \begin{listing}[H] - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} -retry_requested = 0; -for (Node = 0; Node < MAX_NODES_SUPPORTED; Node++) { - struct DCTStatStruc *pDCTstat; - pDCTstat = pDCTstatA + Node; - - if (pDCTstat->NodePresent) { - if (pDCTstat->TrainErrors & (1 << SB_FatalError)) { - printk(BIOS_ERR, "DIMM training FAILED! Restarting system..."); - soft_reset(); - } - if (pDCTstat->TrainErrors & (1 << SB_RetryConfigTrain)) { - retry_requested = 1; - - pDCTstat->TrainErrors &= ~(1 << SB_RetryConfigTrain); - pDCTstat->TrainErrors &= ~(1 << SB_NODQSPOS); - pDCTstat->ErrStatus &= ~(1 << SB_RetryConfigTrain); - pDCTstat->ErrStatus &= ~(1 << SB_NODQSPOS); - } - } -} - -if (retry_requested) { - printk(BIOS_DEBUG, "%s: Restarting training on algorithm request\n", - __func__); - /* Reset frequency to minimum */ - for (Node = 0; Node < MAX_NODES_SUPPORTED; Node++) { - struct DCTStatStruc *pDCTstat; - pDCTstat = pDCTstatA + Node; - if (pDCTstat->NodePresent) { - uint8_t original_target_freq = pDCTstat->TargetFreq; - uint8_t original_auto_speed = pDCTstat->DIMMAutoSpeed; - pDCTstat->TargetFreq = mhz_to_memclk_config(mctGet_NVbits(NV_MIN_MEMCLK)); - pDCTstat->Speed = pDCTstat->DIMMAutoSpeed = pDCTstat->TargetFreq; - SetTargetFreq(pMCTstat, pDCTstatA, Node); - pDCTstat->TargetFreq = original_target_freq; - pDCTstat->DIMMAutoSpeed = original_auto_speed; - } - } - /* Apply any DIMM timing changes */ - for (Node = 0; Node < MAX_NODES_SUPPORTED; Node++) { - struct DCTStatStruc *pDCTstat; - pDCTstat = pDCTstatA + Node; - if (pDCTstat->NodePresent) { - AutoCycTiming_D(pMCTstat, pDCTstat, 0); - if (!pDCTstat->GangedMode) - if (pDCTstat->DIMMValidDCT[1] > 0) - AutoCycTiming_D(pMCTstat, pDCTstat, 1); - } - } - goto retry_dqs_training_and_levelization; -} - \end{minted} - \end{adjustwidth} - \caption{Error detection and retry mechanism during DQS training, - extract from the - \protect\path{DQSTiming_D} function in - \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} - \label{lst:error_handling} - \end{listing} - The function checks for any errors during the DQS training. If errors are detected, it may request a retrain, reset certain parameters, and restart the training process and even restart @@ -2779,69 +2639,6 @@ if (Pass == FirstPass) { \label{lst:write_level_first_pass} \end{listing} - \begin{listing}[H] - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} -if (Pass == SecondPass) { - if (pDCTstat->TargetFreq > mhz_to_memclk_config(mctGet_NVbits(NV_MIN_MEMCLK))) { - uint8_t global_phy_training_status = 0; - final_target_freq = pDCTstat->TargetFreq; - - while (pDCTstat->Speed != final_target_freq) { - if (is_fam15h()) - pDCTstat->TargetFreq = - fam15h_next_highest_memclk_freq(pDCTstat->Speed); - else - pDCTstat->TargetFreq = final_target_freq; - SetTargetFreq(pMCTstat, pDCTstatA, Node); - timeout = 0; - do { - status = 0; - timeout++; - status |= PhyWLPass2(pMCTstat, pDCTstat, 0, - (pDCTstat->TargetFreq == final_target_freq)); - status |= PhyWLPass2(pMCTstat, pDCTstat, 1, - (pDCTstat->TargetFreq == final_target_freq)); - if (status) - printk(BIOS_INFO, - "%s: Retrying write levelling due to invalid value(s) " - "detected in last phase\n", - __func__); - } while (status && (timeout < 8)); - global_phy_training_status |= status; - } - - pDCTstat->TargetFreq = final_target_freq; - - if (global_phy_training_status) - printk(BIOS_WARNING, - "%s: Uncorrectable invalid value(s) detected in second phase of " - "write levelling; " - "continuing but system may be unstable!\n", - __func__); - - uint8_t dct; - for (dct = 0; dct < 2; dct++) { - sDCTStruct *pDCTData = pDCTstat->C_DCTPtr[dct]; - memcpy(pDCTData->WLGrossDelayFinalPass, - pDCTData->WLGrossDelayPrevPass, - sizeof(pDCTData->WLGrossDelayPrevPass)); - memcpy(pDCTData->WLFineDelayFinalPass, - pDCTData->WLFineDelayPrevPass, - sizeof(pDCTData->WLFineDelayPrevPass)); - pDCTData->WLCriticalGrossDelayFinalPass = - pDCTData->WLCriticalGrossDelayPrevPass; - } - } -} - \end{minted} - \end{adjustwidth} - \caption{Write Leveling (second pass), extract from the - \texttt{WriteLevelization\_HW} function in - \texttt{src/northbridge/amd/amdmct/mct\_ddr3/mcthwl.c}.} - \label{lst:write_level_second_pass} - \end{listing} - \subsubsection{Details on the write leveling implementation} \subsection{Write Leveling on AMD Fam15h G34 Processors with RDIMMs} @@ -2854,7 +2651,8 @@ if (Pass == SecondPass) { write leveling process is divided into three distinct phases, each managed by a specific function: \path{AgesaHwWlPhase1}, \path{AgesaHwWlPhase2}, and - \path{AgesaHwWlPhase3}. These phases work together to + \path{AgesaHwWlPhase3} from \path{mcthwl.c}. + These phases work together to fine-tune the timing delays (gross and fine) for each byte lane, ensuring reliable data transmission. \\ @@ -2864,14 +2662,17 @@ if (Pass == SecondPass) { operations apply to the correct DIMM. \\ \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} set_DCT_ADDR_Bits(pDCTData, dct, pDCTData->NodeId, FUN_DCT, DRAM_ADD_DCT_PHY_CONTROL_REG, TrDimmSelStart, TrDimmSelEnd, (u32)dimm); - \end{minted} - \end{adjustwidth} - \caption{Target DIMM selection for write leveling.} + \end{minted} + \end{adjustwidth} + \caption{Target DIMM selection for write leveling, + extract from + \protect\path{AgesaHwWlPhase1} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:target_dimm_selection} \end{listing} @@ -2882,15 +2683,18 @@ set_DCT_ADDR_Bits(pDCTData, dct, pDCTData->NodeId, FUN_DCT, both nibbles. \\ \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} train_both_nibbles = 0; if (pDCTstat->Dimmx4Present) if (is_fam15h()) train_both_nibbles = 1; - \end{minted} - \end{adjustwidth} - \caption{Handling of x4 DIMMs and nibble training.} + \end{minted} + \end{adjustwidth} + \caption{Handling of x4 DIMMs and nibble training, + extract from + \protect\path{AgesaHwWlPhase1} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:x4_dimm_handling} \end{listing} @@ -2904,7 +2708,10 @@ if (pDCTstat->Dimmx4Present) prepareDimms(pMCTstat, pDCTstat, dct, dimm, TRUE); \end{minted} \end{adjustwidth} - \caption{Preparing DIMMs for write leveling.} + \caption{Preparing DIMMs for write leveling, + extract from + \protect\path{AgesaHwWlPhase1} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:prepare_dimms} \end{listing} @@ -2950,7 +2757,10 @@ Seed_Gross = (Seed_Total >> 5) & 0x1f; Seed_Fine = Seed_Total & 0x1f; \end{minted} \end{adjustwidth} - \caption{Seed generation in \texttt{procConfig}.} + \caption{Seed generation, + extract from + \protect\path{procConfig} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:seed_generation} \end{listing} @@ -2965,10 +2775,30 @@ set_DCT_ADDR_Bits(pDCTData, dct, pDCTData->NodeId, FUN_DCT, DRAM_ADD_DCT_PHY_CONTROL_REG, WrtLvTrEn, WrtLvTrEn, 1); \end{minted} \end{adjustwidth} - \caption{Initiating write leveling training.} + \caption{Initiating write leveling training, + extract from + \protect\path{AgesaHwWlPhase1} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:initiate_write_leveling} \end{listing} + If the DIMM is not x4, the function skips the nibble + training loop, as it is unnecessary. \\ + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +if ((pDCTstat->Dimmx4Present & (1 << (dimm + dct))) == 0) + break; + \end{minted} + \end{adjustwidth} + \caption{Exit for non-x4 DIMMs, + extract from + \protect\path{AgesaHwWlPhase2} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} + \label{lst:exit_non_x4} + \end{listing} + After a delay to allow the leveling process to stabilize, the function reads the gross and fine delay values from the relevant registers and stores them. These values represent @@ -2983,24 +2813,13 @@ for (ByteLane = 0; ByteLane < lane_count; ByteLane++) { } \end{minted} \end{adjustwidth} - \caption{Reading and storing delay values after write leveling.} + \caption{Reading and storing delay values after write leveling, + extract from + \protect\path{AgesaHwWlPhase2} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:finalize_write_leveling} \end{listing} - If the DIMM is not x4, the function skips the nibble - training loop, as it is unnecessary. \\ - - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} -if ((pDCTstat->Dimmx4Present & (1 << (dimm + dct))) == 0) - break; - \end{minted} - \end{adjustwidth} - \caption{Exit for non-x4 DIMMs.} - \label{lst:exit_non_x4} - \end{listing} - \subsubsection{Details on the DQS position training function} The DQS position training is a crucial step in the memory @@ -3016,10 +2835,15 @@ if ((pDCTstat->Dimmx4Present & (1 << (dimm + dct))) == 0) settings necessary for the training process. These include: \begin{itemize} - \item \texttt{Errors}: A variable to track any errors encountered during the training. - \item \texttt{dual\_rank}: A flag to indicate whether the current DIMM has two ranks. - \item \texttt{passing\_dqs\_delay\_found}: An array to track whether a passing DQS delay has been found for each lane. - \item \texttt{dqs\_results\_array}: A multi-dimensional array to store the results of the DQS delay tests across different write and read steps. + \item \path{Errors}: A variable to track any errors + encountered during the training. + \item \path{dual_rank}: A flag to indicate whether the + current DIMM has two ranks. + \item \path{passing_dqs_delay_found}: An array to track + whether a passing DQS delay has been found for each lane. + \item \path{dqs_results_array}: A multi-dimensional array to + store the results of the DQS delay tests across + different write and read steps. \end{itemize} The function then loops over each receiver (loosely associated @@ -3037,7 +2861,10 @@ for (Receiver = receiver_start; Receiver < receiver_end; Receiver++) { } \end{minted} \end{adjustwidth} - \caption{Initialization of variables and looping over each receiver.} + \caption{Looping over each receiver, + extract from + \protect\path{TrainDQSRdWrPos_D_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c}} \label{lst:dqs_train_init} \end{listing} @@ -3046,9 +2873,15 @@ for (Receiver = receiver_start; Receiver < receiver_end; Receiver++) { configuration. This is done by: \begin{enumerate} - \item Iterating over the write data delay values from the initial value to the initial value plus 1 UI (Unit Interval). - \item For each write data delay, iterating over possible read DQS delay values from 0 to 1 UI. - \item For each combination of write and read delays, testing the configuration by writing a training pattern to the memory and reading it back to check if it passes or fails. + \item Iterating over the write data delay values from the + initial value to the initial value plus 1 UI + (Unit Interval). + \item For each write data delay, iterating over possible + read DQS delay values from 0 to 1 UI. + \item For each combination of write and read delays, testing + the configuration by writing a training pattern to the + memory and reading it back to check if it passes or + fails. \end{enumerate} \begin{listing} @@ -3069,7 +2902,10 @@ for (current_write_data_delay[lane] = initial_write_dqs_delay[lane]; } \end{minted} \end{adjustwidth} - \caption{Iteration over write and read delay values for each lane.} + \caption{Iteration over write and read delay values for each lane, + extract from + \protect\path{TrainDQSRdWrPos_D_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c}} \label{lst:dqs_train_iteration} \end{listing} @@ -3087,9 +2923,13 @@ for (current_write_data_delay[lane] = initial_write_dqs_delay[lane]; This is done by: \begin{itemize} - \item Finding the longest consecutive string of passing values for both read and write operations. - \item Calculating the center of the passing region and using this as the optimal delay setting. - \item If the center of the region is below a threshold, issuing a warning that a negative DQS recovery delay was detected, which could lead to instability. + \item Finding the longest consecutive string of passing + values for both read and write operations. + \item Calculating the center of the passing region and using + this as the optimal delay setting. + \item If the center of the region is below a threshold, + issuing a warning that a negative DQS recovery delay + was detected, which could lead to instability. \end{itemize} \begin{listing} @@ -3110,7 +2950,10 @@ if (best_count > 2) { } \end{minted} \end{adjustwidth} - \caption{Processing the results to determine the best DQS delay settings.} + \caption{Processing the results to determine the best DQS delay settings, + extract from + \protect\path{TrainDQSRdWrPos_D_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c}} \label{lst:dqs_train_results} \end{listing} @@ -3137,7 +2980,10 @@ pDCTstat->ErrStatus |= Errors; return !Errors; \end{minted} \end{adjustwidth} - \caption{Final error handling and return value.} + \caption{Final error handling and return value, + extract from + \protect\path{TrainDQSRdWrPos_D_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c}} \label{lst:dqs_train_finalize} \end{listing} @@ -3166,10 +3012,11 @@ return !Errors; controller can reliably read data from the memory modules. The algorithm is implemented in the function \path{dqsTrainRcvrEn_SW_Fam15} from - \path{src/northbridge/.../mctsrc.c}, which orchestrates the + \path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}, which + orchestrates the entire process, called by the \path{mct_TrainRcvrEn_D} function, which has been called itself by \path{TrainReceiverEn_D} from - \path{src/northbridge/.../mctdqs_d.c}. \\ + \path{src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c}. \\ Here, seeds are initial delay values used to set up the memory controller's timing parameters. These seeds are @@ -3186,44 +3033,6 @@ return !Errors; are specific to the memory configuration and are adjusted based on the type of DIMM and the number of DIMMs in each channel. \\ - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} -uint8_t MaxDimmsInstallable = mctGet_NVbits(NV_MAX_DIMMS_PER_CH); - -if (pDCTstat->Status & (1 << SB_Registered)) { - if (package_type == PT_GR) { - // Socket G34: Fam15h BKDG v3.14 Table 99 - if (MaxDimmsInstallable == 1) { - if (channel == 0) - seed = 0x43; - else if (channel == 1) - seed = 0x3f; - else if (channel == 2) - seed = 0x3a; - else if (channel == 3) - seed = 0x35; - } - ... - } - ... -} else if (pDCTstat->Status & (1 << SB_LoadReduced)) { - // Load Reduced DIMM configuration - if (package_type == PT_GR) { - // Socket G34: Fam15h BKDG v3.14 Table 99 - if (MaxDimmsInstallable == 1) { - if (channel == 0) - seed = 0x123; - ... - } - } -} - \end{minted} - \end{adjustwidth} - \caption{Seed generation for DQS receiver enable training based on DIMM type and configuration.} - \label{lst:seed_generation} - \end{listing} - The generated seed values are then adjusted based on the operating frequency of the memory (MEMCLK). The adjustment scales the seed values to account for the difference between @@ -3238,7 +3047,11 @@ initial_seed = (uint16_t) (((((uint64_t) initial_seed) * fam15h_freq_tab[mem_clk] * 100) / (min_mem_clk * 100))); \end{minted} \end{adjustwidth} - \caption{Adjusting the seed values based on the operating frequency of the memory.} + \caption{Adjusting the seed values based on the operating + frequency of the memory, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}} \label{lst:seed_adjustment} \end{listing} @@ -3266,7 +3079,11 @@ for (lane = 0; lane < lane_count; lane++) { } \end{minted} \end{adjustwidth} - \caption{Setting initial delay values based on the generated seed values.} + \caption{Setting initial delay values based on the generated + seed values, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}} \label{lst:initial_delay_values} \end{listing} @@ -3289,7 +3106,10 @@ fam15EnableTrainingMode(pMCTstat, pDCTstat, ch, 1); _DisableDramECC = mct_DisableDimmEccEn_D(pMCTstat, pDCTstat); \end{minted} \end{adjustwidth} - \caption{Initialization phase: Enabling training mode and disabling ECC.} + \caption{Initialization phase: Enabling training mode and disabling ECC, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}} \label{lst:initialization_phase} \end{listing} @@ -3312,7 +3132,10 @@ for (rank = 0; rank < (_2Ranks + 1); rank++) { } \end{minted} \end{adjustwidth} - \caption{Training phase: Iterating over ranks and nibbles to apply delay values.} + \caption{Iterating over ranks and nibbles to apply delay values, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}} \label{lst:training_phase} \end{listing} @@ -3336,7 +3159,10 @@ if (Pass == FirstPass) { } \end{minted} \end{adjustwidth} - \caption{Finalization phase: Exiting training mode and setting read latency.} + \caption{Exiting training mode and setting read latency, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}} \label{lst:finalization_phase} \end{listing} @@ -3367,7 +3193,10 @@ if (Pass == FirstPass) { uint8_t addr_prelaunch = 0; /* TODO: Fetch the correct value from RC2[0] */ \end{minted} \end{adjustwidth} - \caption{\texttt{TODO} comment indicating an unimplemented feature in the seed adjustment logic.} + \caption{An unimplemented feature in the seed adjustment logic, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mcrsrc.c}} \label{lst:todo_rc2} \end{listing} @@ -3375,7 +3204,8 @@ uint8_t addr_prelaunch = 0; /* TODO: Fetch the correct value from RC2[0] */ may not be fully optimized, as the correct prelaunch address setting is not being applied. This could result in incorrect seed values being used during the training, leading to - suboptimal alignment of the DQS signal. \\ + suboptimal alignment of the DQS signal. Also, the comment + is unclear about what RC2[0] really means. \\ The code contains another \path{TODO} comment indicating that the support for Load Reduced DIMMs (LRDIMMs) is unimplemented: @@ -3391,7 +3221,11 @@ else if ((pDCTstat->Status & (1 << SB_LoadReduced))) { } \end{minted} \end{adjustwidth} - \caption{\texttt{TODO} comment indicating that LRDIMM support is unimplemented.} + \caption{LRDIMM support is + unimplemented, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mcrsrc.c}} \label{lst:todo_lrdimm} \end{listing} @@ -3413,11 +3247,22 @@ else if ((pDCTstat->Status & (1 << SB_LoadReduced))) { \begin{listing} \begin{adjustwidth}{0.5cm}{0.5cm} \begin{minted}[linenos]{c} -lo &= ~(1 << 15); /* SSEDIS */ -_WRMSR(msr, lo, hi); /* Setting wrap32dis allows 64-bit memory references in real mode */ +msr = HWCR_MSR; +_RDMSR(msr, &lo, &hi); +/* FIXME: Why use SSEDIS */ +if (lo & (1 << 17)) { /* save the old value */ + _Wrap32Dis = 1; +} +lo |= (1 << 17); /* HWCR.wrap32dis */ +lo &= ~(1 << 15); /* SSEDIS */ +_WRMSR(msr, lo, hi); /* Setting wrap32dis allows 64-bit memory references in real mode */ \end{minted} \end{adjustwidth} - \caption{\texttt{FIXME} comment questioning the use of \texttt{SSEDIS} in the MSR setting.} + \caption{Questioning the use of + \texttt{SSEDIS} in the MSR setting, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mcrsrc.c}} \label{lst:fixme_ssedis} \end{listing} @@ -3439,7 +3284,11 @@ _WRMSR(msr, lo, hi); /* Setting wrap32dis allows 64-bit memory references in rea */ \end{minted} \end{adjustwidth} - \caption{\texttt{FIXME} comment questioning a possible misprint in the BKDG regarding delay settings.} + \caption{A possible misprint + in the BKDG regarding delay settings, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mcrsrc.c}} \label{lst:fixme_misprint} \end{listing} @@ -3505,7 +3354,10 @@ if (pDCTstat->Status & (1 << SB_Registered)) { } \end{minted} \end{adjustwidth} - \caption{Seeds used for DQS Receiver training.} + \caption{Seeds used for DQS Receiver training, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mcrsrc.c}} \label{lst:dqs_receiver_training_seeds} \end{listing} @@ -3516,7 +3368,10 @@ initial_seed = (uint16_t) (((((uint64_t) initial_seed) * fam15h_freq_tab[mem_clk] * 100) / (min_mem_clk * 100))); \end{minted} \end{adjustwidth} - \caption{Complex seed adjustment logic that could lead to timing mismatches.} + \caption{Complex seed adjustment logic, + extract from + \protect\path{dqsTrainRcvrEn_SW_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mcrsrc.c}} \label{lst:seed_adjustment_logic} \end{listing} @@ -3547,7 +3402,8 @@ initial_seed = (uint16_t) (((((uint64_t) initial_seed) * In the \path{procConfig} function, a \path{TODO} comment mentions that the current implementation may not be using - the correct or final value for this variable, potentially + the correct or final value for this variable, once again because + of a value from RC2[0] that isn't fetched, potentially leading to inaccuracies in the seed values used during write leveling. This inaccuracy can result in timing mismatches, which may cause data corruption or other stability issues. \\ @@ -3558,28 +3414,14 @@ initial_seed = (uint16_t) (((((uint64_t) initial_seed) * uint8_t AddrCmdPrelaunch = 0; /* TODO: Fetch the correct value from RC2[0] */ \end{minted} \end{adjustwidth} - \caption{\texttt{TODO} indicating incomplete seed generation implementation.} + \caption{Incomplete seed generation + implementation, + extract from + \protect\path{procConfig} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:todo_seed_generation} \end{listing} - In \path{AgesaHwWlPhase2}, there is a \path{FIXME} comment that - suggests that the Critical Gross Delay adjustment has been - temporarily disabled due to conflicts with RDIMM training. - Disabling this adjustment can lead to less precise DQS alignment, - especially in complex memory configurations like those using - RDIMMs, potentially causing instability or degraded performance. - \\ - - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} -/* FIXME: For now, disable CGD adjustment as it seems to interfere with registered DIMM training */ - \end{minted} - \end{adjustwidth} - \caption{\texttt{FIXME} indicating disabled CGD adjustment due to conflicts.} - \label{lst:fixme_cgd_adjustment} - \end{listing} - Another \path{FIXME} in the code indicates that the \path{WrDqDqsEarly} parameter, which is critical for fine-tuning the DQS signal’s timing during write operations, is being @@ -3594,11 +3436,61 @@ uint8_t AddrCmdPrelaunch = 0; /* TODO: Fetch the correct value from RC2[0] */ /* FIXME: Ignore WrDqDqsEarly for now to work around training issues */ \end{minted} \end{adjustwidth} - \caption{\texttt{FIXME} indicating the omission of \texttt{WrDqDqsEarly} parameter.} + \caption{Omission of + \texttt{WrDqDqsEarly} parameter, + extract from + \protect\path{procConfig} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:fixme_wrdqdqs_early} + \end{listing}} + + The current implementation uses generic or "stock" seed values + for certain configurations, such as Socket G34. Without + mainboard-specific overrides, the memory initialization process + might not be fully optimized for the particular motherboard in + use. This could result in suboptimal performance or stability + issues in specific environments, particularly in server + applications where memory performance is critical. \\ + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +/* FIXME: Implement mainboard-specific seed and WrDqsGrossDly base overrides. + * 0x41 and 0x0 are the "stock" values */ + \end{minted} + \end{adjustwidth} + \caption{\texttt{FIXME} indicating the need for + mainboard-specific seed overrides, + extract from + \protect\path{procConfig} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} + \label{lst:fixme_mainboard_specific_overrides} \end{listing} - In \path{AgesaHwWlPhase2}, the function bypasses certain + In \path{AgesaHwWlPhase2}, there is a \path{FIXME} comment that + suggests that the Critical Gross Delay adjustment has been + temporarily disabled due to conflicts with RDIMM training. + Disabling this adjustment can lead to less precise DQS alignment, + especially in complex memory configurations like those using + RDIMMs, potentially causing instability or degraded performance. + \\ + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +/* FIXME: For now, disable CGD adjustment as it seems to interfere with + * registered DIMM training */ + \end{minted} + \end{adjustwidth} + \caption{Disabled CGD adjustment due + to conflicts, + extract from + \protect\path{AgesaHwWlPhase2} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} + \label{lst:fixme_cgd_adjustment} + \end{listing} + + The function also bypasses certain critical adjustments if the memory speed is being tuned (e.g., during frequency stepping). This bypass is noted as a temporary measure due to problems encountered during testing, where the @@ -3616,7 +3508,11 @@ uint8_t AddrCmdPrelaunch = 0; /* TODO: Fetch the correct value from RC2[0] */ * and Pass 2 cannot lock). Figure out why this is and fix it, then remove the bypass code below... */ \end{minted} \end{adjustwidth} - \caption{\texttt{FIXME} indicating the bypass of critical adjustments during speed tuning.} + \caption{Bypass of critical + adjustments during speed tuning, + extract from + \protect\path{AgesaHwWlPhase2} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:fixme_bypass_critical_adjustments} \end{listing} @@ -3632,35 +3528,22 @@ uint8_t AddrCmdPrelaunch = 0; /* TODO: Fetch the correct value from RC2[0] */ \begin{adjustwidth}{0.5cm}{0.5cm} \begin{minted}[linenos]{c} if (faulty_value_detected) { - pDCTData->WLGrossDelay[index+ByteLane] = pDCTData->WLSeedGrossDelay[index+ByteLane]; - pDCTData->WLFineDelay[index+ByteLane] = pDCTData->WLSeedFineDelay[index+ByteLane]; + pDCTData->WLGrossDelay[index+ByteLane] = + pDCTData->WLSeedGrossDelay[index+ByteLane]; + pDCTData->WLFineDelay[index+ByteLane] = + pDCTData->WLSeedFineDelay[index+ByteLane]; status = 1; } \end{minted} \end{adjustwidth} - \caption{Reactive error handling to compensate for noise and instability.} + \caption{Blunt error handling to compensate for noise and + instability, + extract from + \protect\path{AgesaHwWlPhase2} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c}} \label{lst:reactive_error_handling} \end{listing} - The current implementation uses generic or "stock" seed values - for certain configurations, such as Socket G34. Without - mainboard-specific overrides, the memory initialization process - might not be fully optimized for the particular motherboard in - use. This could result in suboptimal performance or stability - issues in specific environments, particularly in server - applications where memory performance is critical. \\ - - \begin{listing} - \begin{adjustwidth}{0.5cm}{0.5cm} - \begin{minted}[linenos]{c} -/* FIXME: Implement mainboard-specific seed and WrDqsGrossDly base overrides. - * 0x41 and 0x0 are the "stock" values */ - \end{minted} - \end{adjustwidth} - \caption{\texttt{FIXME} indicating the need for mainboard-specific seed overrides.} - \label{lst:fixme_mainboard_specific_overrides} - \end{listing} - The handling of x4 DIMMs, with separate training for each nibble, introduces additional complexity. While necessary for these configurations, the logic is fragmented, with several points @@ -3682,9 +3565,12 @@ if (faulty_value_detected) { constants and magic numbers, such as: \begin{itemize} - \item The use of \texttt{0x20} to represent 1 UI (Unit Interval) in multiple places. - \item The constant \texttt{16} used in the adjustment of \texttt{region\_center} during the processing of results. - \item Magic numbers like \texttt{32} and \texttt{48} in the array dimensions for \texttt{dqs\_results\_array}. + \item The use of \texttt{0x20} to represent 1 UI (Unit + Interval) in multiple places. + \item The constant \texttt{16} used in the adjustment of + \texttt{region\_center} during the processing of results. + \item Magic numbers like \texttt{32} and \texttt{48} in the + array dimensions for \texttt{dqs\_results\_array}. \end{itemize} These values should be replaced with named constants or @@ -3755,6 +3641,32 @@ if (faulty_value_detected) { exceed hardware limitations or cause timing violations. \end{itemize} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +if (best_count > 2) { + uint16_t region_center = (best_pos + (best_count / 2)); + if (region_center < 16) { + printk(BIOS_WARNING, "TrainDQSRdWrPos: negative DQS recovery delay detected!"); + region_center = 0; + } else { + region_center -= 16; + } + ... + current_read_dqs_delay[lane] = region_center; + passing_dqs_delay_found[lane] = 1; + write_dqs_read_data_timing_registers(current_read_dqs_delay, dev, dct, dimm, index_reg); +} + \end{minted} + \end{adjustwidth} + \caption{Allowing a negative DQS recovery delay measurement, + extract from + \protect\path{TrainDQSRdWrPos_D_Fam15} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c}} + \label{lst:dqs_train_results} + \end{listing} + Improving the handling of edge cases and boundary conditions, possibly by incorporating more robust validation checks and conservative fallback mechanisms, would make the algorithm more @@ -3971,7 +3883,6 @@ if (faulty_value_detected) { the memory system is correctly configured or if further adjustments or troubleshooting are needed. \\ - % ------------------------------------------------------------------------------ % CHAPTER 5: Virtualization of the operating system through firmware abstraction % ------------------------------------------------------------------------------ @@ -4291,546 +4202,1216 @@ if (faulty_value_detected) { % Bibliography \nocite{*} -\addcontentsline{toc}{chapter}{Bibliography} \printbibliography +\addcontentsline{toc}{chapter}{Bibliography} +\newpage + +\chapter*{Appendix: Long code listings} +\addcontentsline{toc}{chapter}{Appendix: Long code listings} +\renewcommand{\thelisting}{\arabic{listing}} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_1.c} + \end{adjustwidth} + \caption{ + Beginning of + \protect\path{mctAutoInitMCT_D()}, extract from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_1} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_2.c} + \end{adjustwidth} + \caption{ + DIMM initialization in + \protect\path{mctAutoInitMCT_D()}, extract from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_2} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_3.c} + \end{adjustwidth} + \caption{ + Voltage control in + \protect\path{mctAutoInitMCT_D()}, extract from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_3} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_fixme.c} + \end{adjustwidth} + \caption{ + \protect\path{mctAutoInitMCT_D()} does not allow restoring + previous training values, extract from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_fixme} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_4.c} + \end{adjustwidth} + \caption{ + Preparing SMBus, DCTs and NB in + \protect\path{mctAutoInitMCT_D()} from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_4} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_5.c} + \end{adjustwidth} + \caption{ + Get DQS, reset and activate ECC in + \protect\path{mctAutoInitMCT_D()} from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_5} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \inputminted{c}{ + listings/src_northbridge_amd_amdmct_mct_ddr3_mct_d_6.c} + \end{adjustwidth} + \caption{ + Mapping DRAM with cache, validating DCT nodes + and finishing the init process in + \protect\path{mctAutoInitMCT_D()} from + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:mctAutoInitMCT_D_6} + \end{listing} + + \begin{listing}[H] + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +retry_requested = 0; +for (Node = 0; Node < MAX_NODES_SUPPORTED; Node++) { + struct DCTStatStruc *pDCTstat; + pDCTstat = pDCTstatA + Node; + + if (pDCTstat->NodePresent) { + if (pDCTstat->TrainErrors & (1 << SB_FatalError)) { + printk(BIOS_ERR, "DIMM training FAILED! Restarting system..."); + soft_reset(); + } + if (pDCTstat->TrainErrors & (1 << SB_RetryConfigTrain)) { + retry_requested = 1; + + pDCTstat->TrainErrors &= ~(1 << SB_RetryConfigTrain); + pDCTstat->TrainErrors &= ~(1 << SB_NODQSPOS); + pDCTstat->ErrStatus &= ~(1 << SB_RetryConfigTrain); + pDCTstat->ErrStatus &= ~(1 << SB_NODQSPOS); + } + } +} + +if (retry_requested) { + printk(BIOS_DEBUG, "%s: Restarting training on algorithm request\n", + __func__); + /* Reset frequency to minimum */ + for (Node = 0; Node < MAX_NODES_SUPPORTED; Node++) { + struct DCTStatStruc *pDCTstat; + pDCTstat = pDCTstatA + Node; + if (pDCTstat->NodePresent) { + uint8_t original_target_freq = pDCTstat->TargetFreq; + uint8_t original_auto_speed = pDCTstat->DIMMAutoSpeed; + pDCTstat->TargetFreq = mhz_to_memclk_config(mctGet_NVbits(NV_MIN_MEMCLK)); + pDCTstat->Speed = pDCTstat->DIMMAutoSpeed = pDCTstat->TargetFreq; + SetTargetFreq(pMCTstat, pDCTstatA, Node); + pDCTstat->TargetFreq = original_target_freq; + pDCTstat->DIMMAutoSpeed = original_auto_speed; + } + } + /* Apply any DIMM timing changes */ + for (Node = 0; Node < MAX_NODES_SUPPORTED; Node++) { + struct DCTStatStruc *pDCTstat; + pDCTstat = pDCTstatA + Node; + if (pDCTstat->NodePresent) { + AutoCycTiming_D(pMCTstat, pDCTstat, 0); + if (!pDCTstat->GangedMode) + if (pDCTstat->DIMMValidDCT[1] > 0) + AutoCycTiming_D(pMCTstat, pDCTstat, 1); + } + } + goto retry_dqs_training_and_levelization; +} + \end{minted} + \end{adjustwidth} + \caption{Error detection and retry mechanism during DQS training, + extract from the + \protect\path{DQSTiming_D} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mct_d.c}} + \label{lst:error_handling} + \end{listing} + + \begin{listing}[H] + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +if (Pass == SecondPass) { + if (pDCTstat->TargetFreq > mhz_to_memclk_config(mctGet_NVbits(NV_MIN_MEMCLK))) { + uint8_t global_phy_training_status = 0; + final_target_freq = pDCTstat->TargetFreq; + + while (pDCTstat->Speed != final_target_freq) { + if (is_fam15h()) + pDCTstat->TargetFreq = + fam15h_next_highest_memclk_freq(pDCTstat->Speed); + else + pDCTstat->TargetFreq = final_target_freq; + SetTargetFreq(pMCTstat, pDCTstatA, Node); + timeout = 0; + do { + status = 0; + timeout++; + status |= PhyWLPass2(pMCTstat, pDCTstat, 0, + (pDCTstat->TargetFreq == final_target_freq)); + status |= PhyWLPass2(pMCTstat, pDCTstat, 1, + (pDCTstat->TargetFreq == final_target_freq)); + if (status) + printk(BIOS_INFO, + "%s: Retrying write levelling due to invalid value(s) " + "detected in last phase\n", + __func__); + } while (status && (timeout < 8)); + global_phy_training_status |= status; + } + + pDCTstat->TargetFreq = final_target_freq; + + if (global_phy_training_status) + printk(BIOS_WARNING, + "%s: Uncorrectable invalid value(s) detected in second phase of " + "write levelling; " + "continuing but system may be unstable!\n", + __func__); + + uint8_t dct; + for (dct = 0; dct < 2; dct++) { + sDCTStruct *pDCTData = pDCTstat->C_DCTPtr[dct]; + memcpy(pDCTData->WLGrossDelayFinalPass, + pDCTData->WLGrossDelayPrevPass, + sizeof(pDCTData->WLGrossDelayPrevPass)); + memcpy(pDCTData->WLFineDelayFinalPass, + pDCTData->WLFineDelayPrevPass, + sizeof(pDCTData->WLFineDelayPrevPass)); + pDCTData->WLCriticalGrossDelayFinalPass = + pDCTData->WLCriticalGrossDelayPrevPass; + } + } +} + \end{minted} + \end{adjustwidth} + \caption{Write Leveling (second pass), extract from the + \texttt{WriteLevelization\_HW} function in + \texttt{src/northbridge/amd/amdmct/mct\_ddr3/mcthwl.c}.} + \label{lst:write_level_second_pass} + \end{listing} + + \begin{listing} + \begin{adjustwidth}{0.5cm}{0.5cm} + \begin{minted}[linenos]{c} +uint8_t MaxDimmsInstallable = mctGet_NVbits(NV_MAX_DIMMS_PER_CH); + +if (pDCTstat->Status & (1 << SB_Registered)) { + if (package_type == PT_GR) { + // Socket G34: Fam15h BKDG v3.14 Table 99 + if (MaxDimmsInstallable == 1) { + if (channel == 0) + seed = 0x43; + else if (channel == 1) + seed = 0x3f; + else if (channel == 2) + seed = 0x3a; + else if (channel == 3) + seed = 0x35; + } + ... + } + ... +} else if (pDCTstat->Status & (1 << SB_LoadReduced)) { + // Load Reduced DIMM configuration + if (package_type == PT_GR) { + // Socket G34: Fam15h BKDG v3.14 Table 99 + if (MaxDimmsInstallable == 1) { + if (channel == 0) + seed = 0x123; + ... + } + } +} + \end{minted} + \end{adjustwidth} + \caption{Seed generation for DQS receiver enable training based on DIMM type + and configuration, + extract from + \protect\path{fam15_receiver_enable_training_seed} function in + \protect\path{src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c}} + \label{lst:seed_generation} + \end{listing} \newpage % ------------------------------------------------------------------------------ -% LICENSE +% +% +% LICENSES +% +% +% % ------------------------------------------------------------------------------ +\chapter*{\center\rlap{GNU General Public License version 2}} +\addcontentsline{toc}{chapter}{GNU General Public License version 2} + + \parindent 0in + + Version 2, June 1991 + + Copyright \copyright\ 1989, 1991 Free Software Foundation, Inc. + + \bigskip + + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + + \bigskip + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + \bigskip{\bf\large Preamble}\bigskip + + + The licenses for most software are designed to take away your freedom to + share and change it. By contrast, the GNU General Public License is + intended to guarantee your freedom to share and change free software---to + make sure the software is free for all its users. This General Public + License applies to most of the Free Software Foundation's software and to + any other program whose authors commit to using it. (Some other Free + Software Foundation software is covered by the GNU Library General Public + License instead.) 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The act of + running the Program is not restricted, and the output from the Program + is covered only if its contents constitute a work based on the + Program (independent of having been made by running the Program). + Whether that is true depends on what the Program does. + + \item You may copy and distribute verbatim copies of the Program's source + code as you receive it, in any medium, provided that you conspicuously + and appropriately publish on each copy an appropriate copyright notice + and disclaimer of warranty; keep intact all the notices that refer to + this License and to the absence of any warranty; and give any other + recipients of the Program a copy of this License along with the Program. + + You may charge a fee for the physical act of transferring a copy, and you + may at your option offer warranty protection in exchange for a fee. + + \item + + You may modify your copy or copies of the Program or any portion + of it, thus forming a work based on the Program, and copy and + distribute such modifications or work under the terms of Section 1 + above, provided that you also meet all of these conditions: + + \begin{enumerate} + + \item + + You must cause the modified files to carry prominent notices stating that + you changed the files and the date of any change. + + \item + + You must cause any work that you distribute or publish, that in + whole or in part contains or is derived from the Program or any + part thereof, to be licensed as a whole at no charge to all third + parties under the terms of this License. + + \item + If the modified program normally reads commands interactively + when run, you must cause it, when started running for such + interactive use in the most ordinary way, to print or display an + announcement including an appropriate copyright notice and a + notice that there is no warranty (or else, saying that you provide + a warranty) and that users may redistribute the program under + these conditions, and telling the user how to view a copy of this + License. (Exception: if the Program itself is interactive but + does not normally print such an announcement, your work based on + the Program is not required to print an announcement.) + + \end{enumerate} + + + These requirements apply to the modified work as a whole. If + identifiable sections of that work are not derived from the Program, + and can be reasonably considered independent and separate works in + themselves, then this License, and its terms, do not apply to those + sections when you distribute them as separate works. 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If the Program does not specify a version number of + this License, you may choose any version ever published by the Free Software + Foundation. + + \item + If you wish to incorporate parts of the Program into other free + programs whose distribution conditions are different, write to the author + to ask for permission. For software which is copyrighted by the Free + Software Foundation, write to the Free Software Foundation; we sometimes + make exceptions for this. Our decision will be guided by the two goals + of preserving the free status of all derivatives of our free software and + of promoting the sharing and reuse of software generally. + + \bigskip{\Large\sc + No Warranty + }\bigskip + + \item + {\sc Because the program is licensed free of charge, there is no warranty + for the program, to the extent permitted by applicable law. Except when + otherwise stated in writing the copyright holders and/or other parties + provide the program ``as is'' without warranty of any kind, either expressed + or implied, including, but not limited to, the implied warranties of + merchantability and fitness for a particular purpose. The entire risk as + to the quality and performance of the program is with you. Should the + program prove defective, you assume the cost of all necessary servicing, + repair or correction.} + + \item + {\sc In no event unless required by applicable law or agreed to in writing + will any copyright holder, or any other party who may modify and/or + redistribute the program as permitted above, be liable to you for damages, + including any general, special, incidental or consequential damages arising + out of the use or inability to use the program (including but not limited + to loss of data or data being rendered inaccurate or losses sustained by + you or third parties or a failure of the program to operate with any other + programs), even if such holder or other party has been advised of the + possibility of such damages.} + + \end{enumerate} + + + \bigskip{\Large\sc End of Terms and Conditions}\bigskip + + + \pagebreak[2] + + \section*{Appendix: How to Apply These Terms to Your New Programs} + + If you develop a new program, and you want it to be of the greatest + possible use to the public, the best way to achieve this is to make it + free software which everyone can redistribute and change under these + terms. + + To do so, attach the following notices to the program. It is safest to + attach them to the start of each source file to most effectively convey + the exclusion of warranty; and each file should have at least the + ``copyright'' line and a pointer to where the full notice is found. + + \begin{quote} + one line to give the program's name and a brief idea of what it does. \\ + Copyright (C) yyyy name of author \\ + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + \end{quote} + + Also add information on how to contact you by electronic and paper mail. + + If the program is interactive, make it output a short notice like this + when it starts in an interactive mode: + + \begin{quote} + Gnomovision version 69, Copyright (C) yyyy name of author \\ + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. \\ + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + \end{quote} + + + The hypothetical commands {\tt show w} and {\tt show c} should show the + appropriate parts of the General Public License. Of course, the commands + you use may be called something other than {\tt show w} and {\tt show c}; + they could even be mouse-clicks or menu items---whatever suits your + program. + + You should also get your employer (if you work as a programmer) or your + school, if any, to sign a ``copyright disclaimer'' for the program, if + necessary. Here is a sample; alter the names: + + \begin{quote} + Yoyodyne, Inc., hereby disclaims all copyright interest in the program \\ + `Gnomovision' (which makes passes at compilers) written by James Hacker. \\ + + signature of Ty Coon, 1 April 1989 \\ + Ty Coon, President of Vice + \end{quote} + + + This General Public License does not permit incorporating your program + into proprietary programs. If your program is a subroutine library, you + may consider it more useful to permit linking proprietary applications + with the library. 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You may add other material on the covers in addition. -Copying with changes limited to the covers, as long as they preserve -the title of the Document and satisfy these conditions, can be treated -as verbatim copying in other respects. - -If the required texts for either cover are too voluminous to fit -legibly, you should put the first ones listed (as many as fit -reasonably) on the actual cover, and continue the rest onto adjacent -pages. - -If you publish or distribute Opaque copies of the Document numbering -more than 100, you must either include a machine-readable Transparent -copy along with each Opaque copy, or state in or with each Opaque copy -a computer-network location from which the general network-using -public has access to download using public-standard network protocols -a complete Transparent copy of the Document, free of added material. -If you use the latter option, you must take reasonably prudent steps, -when you begin distribution of Opaque copies in quantity, to ensure -that this Transparent copy will remain thus accessible at the stated -location until at least one year after the last time you distribute an -Opaque copy (directly or through your agents or retailers) of that -edition to the public. - -It is requested, but not required, that you contact the authors of the -Document well before redistributing any large number of copies, to give -them a chance to provide you with an updated version of the Document. - - - -\bigskip\bigskip{\Large\bf 4. MODIFICATIONS\par}\bigskip - - -You may copy and distribute a Modified Version of the Document under -the conditions of sections 2 and 3 above, provided that you release -the Modified Version under precisely this License, with the Modified -Version filling the role of the Document, thus licensing distribution -and modification of the Modified Version to whoever possesses a copy -of it. In addition, you must do these things in the Modified Version: - -\begin{itemize} -\item[A.] - Use in the Title Page (and on the covers, if any) a title distinct - from that of the Document, and from those of previous versions - (which should, if there were any, be listed in the History section - of the Document). You may use the same title as a previous version - if the original publisher of that version gives permission. - -\item[B.] - List on the Title Page, as authors, one or more persons or entities - responsible for authorship of the modifications in the Modified - Version, together with at least five of the principal authors of the - Document (all of its principal authors, if it has fewer than five), - unless they release you from this requirement. - -\item[C.] - State on the Title page the name of the publisher of the - Modified Version, as the publisher. - -\item[D.] - Preserve all the copyright notices of the Document. - -\item[E.] - Add an appropriate copyright notice for your modifications - adjacent to the other copyright notices. - -\item[F.] - Include, immediately after the copyright notices, a license notice - giving the public permission to use the Modified Version under the - terms of this License, in the form shown in the Addendum below. - -\item[G.] - Preserve in that license notice the full lists of Invariant Sections - and required Cover Texts given in the Document's license notice. - -\item[H.] - Include an unaltered copy of this License. - -\item[I.] - Preserve the section Entitled ``History'', Preserve its Title, and add - to it an item stating at least the title, year, new authors, and - publisher of the Modified Version as given on the Title Page. If - there is no section Entitled ``History'' in the Document, create one - stating the title, year, authors, and publisher of the Document as - given on its Title Page, then add an item describing the Modified - Version as stated in the previous sentence. - -\item[J.] - Preserve the network location, if any, given in the Document for - public access to a Transparent copy of the Document, and likewise - the network locations given in the Document for previous versions - it was based on. These may be placed in the ``History'' section. - You may omit a network location for a work that was published at - least four years before the Document itself, or if the original - publisher of the version it refers to gives permission. - -\item[K.] - For any section Entitled ``Acknowledgements'' or ``Dedications'', - Preserve the Title of the section, and preserve in the section all - the substance and tone of each of the contributor acknowledgements - and/or dedications given therein. - -\item[L.] - Preserve all the Invariant Sections of the Document, - unaltered in their text and in their titles. Section numbers - or the equivalent are not considered part of the section titles. - -\item[M.] - Delete any section Entitled ``Endorsements''. Such a section - may not be included in the Modified Version. - -\item[N.] - Do not retitle any existing section to be Entitled ``Endorsements'' - or to conflict in title with any Invariant Section. - -\item[O.] - Preserve any Warranty Disclaimers. -\end{itemize} - -If the Modified Version includes new front-matter sections or -appendices that qualify as Secondary Sections and contain no material -copied from the Document, you may at your option designate some or all -of these sections as invariant. To do this, add their titles to the -list of Invariant Sections in the Modified Version's license notice. -These titles must be distinct from any other section titles. - -You may add a section Entitled ``Endorsements'', provided it contains -nothing but endorsements of your Modified Version by various -parties---for example, statements of peer review or that the text has -been approved by an organization as the authoritative definition of a -standard. - -You may add a passage of up to five words as a Front-Cover Text, and a -passage of up to 25 words as a Back-Cover Text, to the end of the list -of Cover Texts in the Modified Version. Only one passage of -Front-Cover Text and one of Back-Cover Text may be added by (or -through arrangements made by) any one entity. If the Document already -includes a cover text for the same cover, previously added by you or -by arrangement made by the same entity you are acting on behalf of, -you may not add another; but you may replace the old one, on explicit -permission from the previous publisher that added the old one. - -The author(s) and publisher(s) of the Document do not by this License -give permission to use their names for publicity for or to assert or -imply endorsement of any Modified Version. - - - -\bigskip\bigskip{\Large\bf 5. COMBINING DOCUMENTS\par}\bigskip - - - -You may combine the Document with other documents released under this -License, under the terms defined in section~4 above for modified -versions, provided that you include in the combination all of the -Invariant Sections of all of the original documents, unmodified, and -list them all as Invariant Sections of your combined work in its -license notice, and that you preserve all their Warranty Disclaimers. - -The combined work need only contain one copy of this License, and -multiple identical Invariant Sections may be replaced with a single -copy. If there are multiple Invariant Sections with the same name but -different contents, make the title of each such section unique by -adding at the end of it, in parentheses, the name of the original -author or publisher of that section if known, or else a unique number. -Make the same adjustment to the section titles in the list of -Invariant Sections in the license notice of the combined work. - -In the combination, you must combine any sections Entitled ``History'' -in the various original documents, forming one section Entitled -``History''; likewise combine any sections Entitled ``Acknowledgements'', -and any sections Entitled ``Dedications''. You must delete all sections -Entitled ``Endorsements''. - - -\bigskip\bigskip{\Large\bf 6. COLLECTIONS OF DOCUMENTS\par}\bigskip - - -You may make a collection consisting of the Document and other documents -released under this License, and replace the individual copies of this -License in the various documents with a single copy that is included in -the collection, provided that you follow the rules of this License for -verbatim copying of each of the documents in all other respects. - -You may extract a single document from such a collection, and distribute -it individually under this License, provided you insert a copy of this -License into the extracted document, and follow this License in all -other respects regarding verbatim copying of that document. - - - -\bigskip\bigskip{\Large\bf 7. AGGREGATION WITH INDEPENDENT WORKS\par}\bigskip - + Version 1.3, 3 November 2008 -A compilation of the Document or its derivatives with other separate -and independent documents or works, in or on a volume of a storage or -distribution medium, is called an ``aggregate'' if the copyright -resulting from the compilation is not used to limit the legal rights -of the compilation's users beyond what the individual works permit. -When the Document is included in an aggregate, this License does not -apply to the other works in the aggregate which are not themselves -derivative works of the Document. + Copyright \copyright{} 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. + + \bigskip + + \path{} + + \bigskip + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + + + + \bigskip\bigskip{\bf\large Preamble}\bigskip + + + The purpose of this License is to make a manual, textbook, or other + functional and useful document ``free'' in the sense of freedom: to + assure everyone the effective freedom to copy and redistribute it, + with or without modifying it, either commercially or noncommercially. + Secondarily, this License preserves for the author and publisher a way + to get credit for their work, while not being considered responsible + for modifications made by others. + + This License is a kind of ``copyleft'', which means that derivative + works of the document must themselves be free in the same sense. It + complements the GNU General Public License, which is a copyleft + license designed for free software. + + We have designed this License in order to use it for manuals for free + software, because free software needs free documentation: a free + program should come with manuals providing the same freedoms that the + software does. But this License is not limited to software manuals; + it can be used for any textual work, regardless of subject matter or + whether it is published as a printed book. We recommend this License + principally for works whose purpose is instruction or reference. + + + + \bigskip\bigskip{\Large\bf 1. APPLICABILITY AND DEFINITIONS\par}\bigskip + + + This License applies to any manual or other work, in any medium, that + contains a notice placed by the copyright holder saying it can be + distributed under the terms of this License. Such a notice grants a + world-wide, royalty-free license, unlimited in duration, to use that + work under the conditions stated herein. The ``\textbf{Document}'', below, + refers to any such manual or work. Any member of the public is a + licensee, and is addressed as ``\textbf{you}''. You accept the license if you + copy, modify or distribute the work in a way requiring permission + under copyright law. -If the Cover Text requirement of section~3 is applicable to these -copies of the Document, then if the Document is less than one half of -the entire aggregate, the Document's Cover Texts may be placed on -covers that bracket the Document within the aggregate, or the -electronic equivalent of covers if the Document is in electronic form. -Otherwise they must appear on printed covers that bracket the whole -aggregate. + A ``\textbf{Modified Version}'' of the Document means any work containing the + Document or a portion of it, either copied verbatim, or with + modifications and/or translated into another language. + A ``\textbf{Secondary Section}'' is a named appendix or a front-matter section of + the Document that deals exclusively with the relationship of the + publishers or authors of the Document to the Document's overall subject + (or to related matters) and contains nothing that could fall directly + within that overall subject. (Thus, if the Document is in part a + textbook of mathematics, a Secondary Section may not explain any + mathematics.) The relationship could be a matter of historical + connection with the subject or with related matters, or of legal, + commercial, philosophical, ethical or political position regarding + them. + The ``\textbf{Invariant Sections}'' are certain Secondary Sections whose titles + are designated, as being those of Invariant Sections, in the notice + that says that the Document is released under this License. If a + section does not fit the above definition of Secondary then it is not + allowed to be designated as Invariant. The Document may contain zero + Invariant Sections. If the Document does not identify any Invariant + Sections then there are none. + + The ``\textbf{Cover Texts}'' are certain short passages of text that are listed, + as Front-Cover Texts or Back-Cover Texts, in the notice that says that + the Document is released under this License. A Front-Cover Text may + be at most 5 words, and a Back-Cover Text may be at most 25 words. + + A ``\textbf{Transparent}'' copy of the Document means a machine-readable copy, + represented in a format whose specification is available to the + general public, that is suitable for revising the document + straightforwardly with generic text editors or (for images composed of + pixels) generic paint programs or (for drawings) some widely available + drawing editor, and that is suitable for input to text formatters or + for automatic translation to a variety of formats suitable for input + to text formatters. A copy made in an otherwise Transparent file + format whose markup, or absence of markup, has been arranged to thwart + or discourage subsequent modification by readers is not Transparent. + An image format is not Transparent if used for any substantial amount + of text. A copy that is not ``Transparent'' is called ``\textbf{Opaque}''. + + Examples of suitable formats for Transparent copies include plain + ASCII without markup, Texinfo input format, LaTeX input format, SGML + or XML using a publicly available DTD, and standard-conforming simple + HTML, PostScript or PDF designed for human modification. Examples of + transparent image formats include PNG, XCF and JPG. Opaque formats + include proprietary formats that can be read and edited only by + proprietary word processors, SGML or XML for which the DTD and/or + processing tools are not generally available, and the + machine-generated HTML, PostScript or PDF produced by some word + processors for output purposes only. + + The ``\textbf{Title Page}'' means, for a printed book, the title page itself, + plus such following pages as are needed to hold, legibly, the material + this License requires to appear in the title page. For works in + formats which do not have any title page as such, ``Title Page'' means + the text near the most prominent appearance of the work's title, + preceding the beginning of the body of the text. + + The ``\textbf{publisher}'' means any person or entity that distributes + copies of the Document to the public. + + A section ``\textbf{Entitled XYZ}'' means a named subunit of the Document whose + title either is precisely XYZ or contains XYZ in parentheses following + text that translates XYZ in another language. (Here XYZ stands for a + specific section name mentioned below, such as ``\textbf{Acknowledgements}'', + ``\textbf{Dedications}'', ``\textbf{Endorsements}'', or ``\textbf{History}''.) + To ``\textbf{Preserve the Title}'' + of such a section when you modify the Document means that it remains a + section ``Entitled XYZ'' according to this definition. + + The Document may include Warranty Disclaimers next to the notice which + states that this License applies to the Document. These Warranty + Disclaimers are considered to be included by reference in this + License, but only as regards disclaiming warranties: any other + implication that these Warranty Disclaimers may have is void and has + no effect on the meaning of this License. + + + + \bigskip\bigskip{\Large\bf 2. VERBATIM COPYING\par}\bigskip + + + You may copy and distribute the Document in any medium, either + commercially or noncommercially, provided that this License, the + copyright notices, and the license notice saying this License applies + to the Document are reproduced in all copies, and that you add no other + conditions whatsoever to those of this License. You may not use + technical measures to obstruct or control the reading or further + copying of the copies you make or distribute. However, you may accept + compensation in exchange for copies. If you distribute a large enough + number of copies you must also follow the conditions in section~3. + + You may also lend copies, under the same conditions stated above, and + you may publicly display copies. + + + + \bigskip\bigskip{\Large\bf 3. COPYING IN QUANTITY\par}\bigskip + + + + If you publish printed copies (or copies in media that commonly have + printed covers) of the Document, numbering more than 100, and the + Document's license notice requires Cover Texts, you must enclose the + copies in covers that carry, clearly and legibly, all these Cover + Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on + the back cover. Both covers must also clearly and legibly identify + you as the publisher of these copies. The front cover must present + the full title with all words of the title equally prominent and + visible. You may add other material on the covers in addition. + Copying with changes limited to the covers, as long as they preserve + the title of the Document and satisfy these conditions, can be treated + as verbatim copying in other respects. + + If the required texts for either cover are too voluminous to fit + legibly, you should put the first ones listed (as many as fit + reasonably) on the actual cover, and continue the rest onto adjacent + pages. + + If you publish or distribute Opaque copies of the Document numbering + more than 100, you must either include a machine-readable Transparent + copy along with each Opaque copy, or state in or with each Opaque copy + a computer-network location from which the general network-using + public has access to download using public-standard network protocols + a complete Transparent copy of the Document, free of added material. + If you use the latter option, you must take reasonably prudent steps, + when you begin distribution of Opaque copies in quantity, to ensure + that this Transparent copy will remain thus accessible at the stated + location until at least one year after the last time you distribute an + Opaque copy (directly or through your agents or retailers) of that + edition to the public. + + It is requested, but not required, that you contact the authors of the + Document well before redistributing any large number of copies, to give + them a chance to provide you with an updated version of the Document. + + + + \bigskip\bigskip{\Large\bf 4. MODIFICATIONS\par}\bigskip + + + You may copy and distribute a Modified Version of the Document under + the conditions of sections 2 and 3 above, provided that you release + the Modified Version under precisely this License, with the Modified + Version filling the role of the Document, thus licensing distribution + and modification of the Modified Version to whoever possesses a copy + of it. In addition, you must do these things in the Modified Version: + + \begin{itemize} + \item[A.] + Use in the Title Page (and on the covers, if any) a title distinct + from that of the Document, and from those of previous versions + (which should, if there were any, be listed in the History section + of the Document). You may use the same title as a previous version + if the original publisher of that version gives permission. + + \item[B.] + List on the Title Page, as authors, one or more persons or entities + responsible for authorship of the modifications in the Modified + Version, together with at least five of the principal authors of the + Document (all of its principal authors, if it has fewer than five), + unless they release you from this requirement. + + \item[C.] + State on the Title page the name of the publisher of the + Modified Version, as the publisher. + + \item[D.] + Preserve all the copyright notices of the Document. + + \item[E.] + Add an appropriate copyright notice for your modifications + adjacent to the other copyright notices. + + \item[F.] + Include, immediately after the copyright notices, a license notice + giving the public permission to use the Modified Version under the + terms of this License, in the form shown in the Addendum below. + + \item[G.] + Preserve in that license notice the full lists of Invariant Sections + and required Cover Texts given in the Document's license notice. + + \item[H.] + Include an unaltered copy of this License. + + \item[I.] + Preserve the section Entitled ``History'', Preserve its Title, and add + to it an item stating at least the title, year, new authors, and + publisher of the Modified Version as given on the Title Page. If + there is no section Entitled ``History'' in the Document, create one + stating the title, year, authors, and publisher of the Document as + given on its Title Page, then add an item describing the Modified + Version as stated in the previous sentence. + + \item[J.] + Preserve the network location, if any, given in the Document for + public access to a Transparent copy of the Document, and likewise + the network locations given in the Document for previous versions + it was based on. These may be placed in the ``History'' section. + You may omit a network location for a work that was published at + least four years before the Document itself, or if the original + publisher of the version it refers to gives permission. + + \item[K.] + For any section Entitled ``Acknowledgements'' or ``Dedications'', + Preserve the Title of the section, and preserve in the section all + the substance and tone of each of the contributor acknowledgements + and/or dedications given therein. + + \item[L.] + Preserve all the Invariant Sections of the Document, + unaltered in their text and in their titles. Section numbers + or the equivalent are not considered part of the section titles. + + \item[M.] + Delete any section Entitled ``Endorsements''. Such a section + may not be included in the Modified Version. + + \item[N.] + Do not retitle any existing section to be Entitled ``Endorsements'' + or to conflict in title with any Invariant Section. + + \item[O.] + Preserve any Warranty Disclaimers. + \end{itemize} -\bigskip\bigskip{\Large\bf 8. TRANSLATION\par}\bigskip + If the Modified Version includes new front-matter sections or + appendices that qualify as Secondary Sections and contain no material + copied from the Document, you may at your option designate some or all + of these sections as invariant. To do this, add their titles to the + list of Invariant Sections in the Modified Version's license notice. + These titles must be distinct from any other section titles. + You may add a section Entitled ``Endorsements'', provided it contains + nothing but endorsements of your Modified Version by various + parties---for example, statements of peer review or that the text has + been approved by an organization as the authoritative definition of a + standard. + + You may add a passage of up to five words as a Front-Cover Text, and a + passage of up to 25 words as a Back-Cover Text, to the end of the list + of Cover Texts in the Modified Version. Only one passage of + Front-Cover Text and one of Back-Cover Text may be added by (or + through arrangements made by) any one entity. If the Document already + includes a cover text for the same cover, previously added by you or + by arrangement made by the same entity you are acting on behalf of, + you may not add another; but you may replace the old one, on explicit + permission from the previous publisher that added the old one. + The author(s) and publisher(s) of the Document do not by this License + give permission to use their names for publicity for or to assert or + imply endorsement of any Modified Version. -Translation is considered a kind of modification, so you may -distribute translations of the Document under the terms of section~4. -Replacing Invariant Sections with translations requires special -permission from their copyright holders, but you may include -translations of some or all Invariant Sections in addition to the -original versions of these Invariant Sections. You may include a -translation of this License, and all the license notices in the -Document, and any Warranty Disclaimers, provided that you also include -the original English version of this License and the original versions -of those notices and disclaimers. In case of a disagreement between -the translation and the original version of this License or a notice -or disclaimer, the original version will prevail. -If a section in the Document is Entitled ``Acknowledgements'', -``Dedications'', or ``History'', the requirement (section~4) to Preserve -its Title (section~1) will typically require changing the actual -title. + \bigskip\bigskip{\Large\bf 5. COMBINING DOCUMENTS\par}\bigskip -\bigskip\bigskip{\Large\bf 9. TERMINATION\par}\bigskip + You may combine the Document with other documents released under this + License, under the terms defined in section~4 above for modified + versions, provided that you include in the combination all of the + Invariant Sections of all of the original documents, unmodified, and + list them all as Invariant Sections of your combined work in its + license notice, and that you preserve all their Warranty Disclaimers. + The combined work need only contain one copy of this License, and + multiple identical Invariant Sections may be replaced with a single + copy. If there are multiple Invariant Sections with the same name but + different contents, make the title of each such section unique by + adding at the end of it, in parentheses, the name of the original + author or publisher of that section if known, or else a unique number. + Make the same adjustment to the section titles in the list of + Invariant Sections in the license notice of the combined work. -You may not copy, modify, sublicense, or distribute the Document -except as expressly provided under this License. Any attempt -otherwise to copy, modify, sublicense, or distribute it is void, and -will automatically terminate your rights under this License. + In the combination, you must combine any sections Entitled ``History'' + in the various original documents, forming one section Entitled + ``History''; likewise combine any sections Entitled ``Acknowledgements'', + and any sections Entitled ``Dedications''. You must delete all sections + Entitled ``Endorsements''. -However, if you cease all violation of this License, then your license -from a particular copyright holder is reinstated (a) provisionally, -unless and until the copyright holder explicitly and finally -terminates your license, and (b) permanently, if the copyright holder -fails to notify you of the violation by some reasonable means prior to -60 days after the cessation. -Moreover, your license from a particular copyright holder is -reinstated permanently if the copyright holder notifies you of the -violation by some reasonable means, this is the first time you have -received notice of violation of this License (for any work) from that -copyright holder, and you cure the violation prior to 30 days after -your receipt of the notice. + \bigskip\bigskip{\Large\bf 6. COLLECTIONS OF DOCUMENTS\par}\bigskip -Termination of your rights under this section does not terminate the -licenses of parties who have received copies or rights from you under -this License. If your rights have been terminated and not permanently -reinstated, receipt of a copy of some or all of the same material does -not give you any rights to use it. + You may make a collection consisting of the Document and other documents + released under this License, and replace the individual copies of this + License in the various documents with a single copy that is included in + the collection, provided that you follow the rules of this License for + verbatim copying of each of the documents in all other respects. + You may extract a single document from such a collection, and distribute + it individually under this License, provided you insert a copy of this + License into the extracted document, and follow this License in all + other respects regarding verbatim copying of that document. -\bigskip\bigskip{\Large\bf 10. FUTURE REVISIONS OF THIS LICENSE\par}\bigskip + \bigskip\bigskip{\Large\bf 7. AGGREGATION WITH INDEPENDENT WORKS\par}\bigskip -The Free Software Foundation may publish new, revised versions -of the GNU Free Documentation License from time to time. Such new -versions will be similar in spirit to the present version, but may -differ in detail to address new problems or concerns. See -\path{https://www.gnu.org/licenses/}. -Each version of the License is given a distinguishing version number. -If the Document specifies that a particular numbered version of this -License ``or any later version'' applies to it, you have the option of -following the terms and conditions either of that specified version or -of any later version that has been published (not as a draft) by the -Free Software Foundation. If the Document does not specify a version -number of this License, you may choose any version ever published (not -as a draft) by the Free Software Foundation. If the Document -specifies that a proxy can decide which future versions of this -License can be used, that proxy's public statement of acceptance of a -version permanently authorizes you to choose that version for the -Document. + A compilation of the Document or its derivatives with other separate + and independent documents or works, in or on a volume of a storage or + distribution medium, is called an ``aggregate'' if the copyright + resulting from the compilation is not used to limit the legal rights + of the compilation's users beyond what the individual works permit. + When the Document is included in an aggregate, this License does not + apply to the other works in the aggregate which are not themselves + derivative works of the Document. + If the Cover Text requirement of section~3 is applicable to these + copies of the Document, then if the Document is less than one half of + the entire aggregate, the Document's Cover Texts may be placed on + covers that bracket the Document within the aggregate, or the + electronic equivalent of covers if the Document is in electronic form. + Otherwise they must appear on printed covers that bracket the whole + aggregate. -\bigskip\bigskip{\Large\bf 11. RELICENSING\par}\bigskip + \bigskip\bigskip{\Large\bf 8. TRANSLATION\par}\bigskip -``Massive Multiauthor Collaboration Site'' (or ``MMC Site'') means any -World Wide Web server that publishes copyrightable works and also -provides prominent facilities for anybody to edit those works. A -public wiki that anybody can edit is an example of such a server. A -``Massive Multiauthor Collaboration'' (or ``MMC'') contained in the -site means any set of copyrightable works thus published on the MMC -site. -``CC-BY-SA'' means the Creative Commons Attribution-Share Alike 3.0 -license published by Creative Commons Corporation, a not-for-profit -corporation with a principal place of business in San Francisco, -California, as well as future copyleft versions of that license -published by that same organization. -``Incorporate'' means to publish or republish a Document, in whole or -in part, as part of another Document. + Translation is considered a kind of modification, so you may + distribute translations of the Document under the terms of section~4. + Replacing Invariant Sections with translations requires special + permission from their copyright holders, but you may include + translations of some or all Invariant Sections in addition to the + original versions of these Invariant Sections. You may include a + translation of this License, and all the license notices in the + Document, and any Warranty Disclaimers, provided that you also include + the original English version of this License and the original versions + of those notices and disclaimers. In case of a disagreement between + the translation and the original version of this License or a notice + or disclaimer, the original version will prevail. -An MMC is ``eligible for relicensing'' if it is licensed under this -License, and if all works that were first published under this License -somewhere other than this MMC, and subsequently incorporated in whole -or in part into the MMC, (1) had no cover texts or invariant sections, -and (2) were thus incorporated prior to November 1, 2008. - -The operator of an MMC Site may republish an MMC contained in the site -under CC-BY-SA on the same site at any time before August 1, 2009, -provided the MMC is eligible for relicensing. + If a section in the Document is Entitled ``Acknowledgements'', + ``Dedications'', or ``History'', the requirement (section~4) to Preserve + its Title (section~1) will typically require changing the actual + title. -\bigskip\bigskip{\Large\bf ADDENDUM: How to use this License for your documents\par}\bigskip + \bigskip\bigskip{\Large\bf 9. TERMINATION\par}\bigskip -To use this License in a document you have written, include a copy of -the License in the document and put the following copyright and -license notices just after the title page: -\bigskip -\begin{quote} - Copyright \copyright{} YEAR YOUR NAME. - Permission is granted to copy, distribute and/or modify this document - under the terms of the GNU Free Documentation License, Version 1.3 - or any later version published by the Free Software Foundation; - with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. - A copy of the license is included in the section entitled ``GNU - Free Documentation License''. -\end{quote} -\bigskip - -If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts, -replace the ``with \dots\ Texts.''\ line with this: - -\bigskip -\begin{quote} - with the Invariant Sections being LIST THEIR TITLES, with the - Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. -\end{quote} -\bigskip - -If you have Invariant Sections without Cover Texts, or some other -combination of the three, merge those two alternatives to suit the -situation. + You may not copy, modify, sublicense, or distribute the Document + except as expressly provided under this License. Any attempt + otherwise to copy, modify, sublicense, or distribute it is void, and + will automatically terminate your rights under this License. -If your document contains nontrivial examples of program code, we -recommend releasing these examples in parallel under your choice of -free software license, such as the GNU General Public License, -to permit their use in free software. + However, if you cease all violation of this License, then your license + from a particular copyright holder is reinstated (a) provisionally, + unless and until the copyright holder explicitly and finally + terminates your license, and (b) permanently, if the copyright holder + fails to notify you of the violation by some reasonable means prior to + 60 days after the cessation. + + Moreover, your license from a particular copyright holder is + reinstated permanently if the copyright holder notifies you of the + violation by some reasonable means, this is the first time you have + received notice of violation of this License (for any work) from that + copyright holder, and you cure the violation prior to 30 days after + your receipt of the notice. + + Termination of your rights under this section does not terminate the + licenses of parties who have received copies or rights from you under + this License. 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site + under CC-BY-SA on the same site at any time before August 1, 2009, + provided the MMC is eligible for relicensing. + + + + \bigskip\bigskip{\Large\bf ADDENDUM: How to use this License for your documents\par}\bigskip + + + To use this License in a document you have written, include a copy of + the License in the document and put the following copyright and + license notices just after the title page: + + \bigskip + \begin{quote} + Copyright \copyright{} YEAR YOUR NAME. + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license is included in the section entitled ``GNU + Free Documentation License''. + \end{quote} + \bigskip + + If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts, + replace the ``with \dots\ Texts.''\ line with this: + + \bigskip + \begin{quote} + with the Invariant Sections being LIST THEIR TITLES, with the + Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. + \end{quote} + \bigskip + + If you have Invariant Sections without Cover Texts, or some other + combination of the three, merge those two alternatives to suit the + situation. + + If your document contains nontrivial examples of program code, we + recommend releasing these examples in parallel under your choice of + free software license, such as the GNU General Public License, + to permit their use in free software. \end{document} diff --git a/hardware_init_review.toc b/hardware_init_review.toc index 296aef9..9784311 100644 --- a/hardware_init_review.toc +++ b/hardware_init_review.toc @@ -1,8 +1,9 @@ \babel@toc {english}{}\relax \contentsline {chapter}{Acknowledgments}{3}{chapter*.1}% \contentsline {chapter}{Abstract}{4}{chapter*.2}% -\contentsline {chapter}{List of Figures}{7}{chapter*.2}% -\contentsline {chapter}{List of Listings}{8}{chapter*.2}% +\contentsline {chapter}{Contents}{5}{chapter*.3}% +\contentsline {chapter}{List of Figures}{7}{chapter*.4}% +\contentsline {chapter}{List of Listings}{9}{chapter*.5}% \contentsline {chapter}{\numberline {1}Introduction to firmware and BIOS evolution}{10}{chapter.1}% \contentsline {section}{\numberline {1.1}Historical context of BIOS}{10}{section.1.1}% \contentsline {subsection}{\numberline {1.1.1}Definition and origin}{10}{subsection.1.1.1}% @@ -26,7 +27,7 @@ \contentsline {subsection}{\numberline {3.1.4}Payload}{27}{subsection.3.1.4}% \contentsline {section}{\numberline {3.2}AMD Platform Security Processor and Intel Management Engine}{28}{section.3.2}% \contentsline {chapter}{\numberline {4}Memory initialization and training}{30}{chapter.4}% -\contentsline {section}{\numberline {4.1}Importance of DDR3 Memory Initialization}{30}{section.4.1}% +\contentsline {section}{\numberline {4.1}Importance of DDR3 memory initialization}{30}{section.4.1}% \contentsline {subsection}{\numberline {4.1.1}General steps for DDR3 configuration}{31}{subsection.4.1.1}% \contentsline {section}{\numberline {4.2}Memory initialization techniques}{34}{section.4.2}% \contentsline {subsection}{\numberline {4.2.1}Memory training algorithms}{34}{subsection.4.2.1}% @@ -36,29 +37,31 @@ \contentsline {subsubsection}{\numberline {4.2.2.3}Write leveling process}{37}{subsubsection.4.2.2.3}% \contentsline {section}{\numberline {4.3}Current implementation and potential improvements}{39}{section.4.3}% \contentsline {subsection}{\numberline {4.3.1}Current implementation in coreboot on the KGPE-D16}{39}{subsection.4.3.1}% -\contentsline {subsubsection}{\numberline {4.3.1.1}Details on the DQS training function}{48}{subsubsection.4.3.1.1}% -\contentsline {subsubsection}{\numberline {4.3.1.2}Details on the write leveling implementation}{51}{subsubsection.4.3.1.2}% -\contentsline {subsubsection}{\numberline {4.3.1.3}Details on the write leveling implementation}{54}{subsubsection.4.3.1.3}% -\contentsline {subsection}{\numberline {4.3.2}Write Leveling on AMD Fam15h G34 Processors with RDIMMs}{54}{subsection.4.3.2}% -\contentsline {subsubsection}{\numberline {4.3.2.1}Details on the DQS position training function}{55}{subsubsection.4.3.2.1}% -\contentsline {subsubsection}{\numberline {4.3.2.2}Details on the DQS receiver training function}{57}{subsubsection.4.3.2.2}% -\contentsline {subsection}{\numberline {4.3.3}Potential enhancements}{60}{subsection.4.3.3}% -\contentsline {subsubsection}{\numberline {4.3.3.1}DQS receiver training}{60}{subsubsection.4.3.3.1}% -\contentsline {subsubsection}{\numberline {4.3.3.2}Write leveling}{61}{subsubsection.4.3.3.2}% -\contentsline {subsection}{\numberline {4.3.4}DQS position training}{63}{subsection.4.3.4}% -\contentsline {subsection}{\numberline {4.3.5}On a wider scale...}{65}{subsection.4.3.5}% -\contentsline {subsubsection}{\numberline {4.3.5.1}Saving training values in NVRAM}{65}{subsubsection.4.3.5.1}% -\contentsline {subsubsection}{\numberline {4.3.5.2}A seedless DQS position training algorithm}{66}{subsubsection.4.3.5.2}% -\contentsline {chapter}{\numberline {5}Virtualization of the operating system through firmware abstraction}{68}{chapter.5}% -\contentsline {section}{\numberline {5.1}ACPI and abstraction of hardware control}{68}{section.5.1}% -\contentsline {section}{\numberline {5.2}SMM as a hidden execution layer}{69}{section.5.2}% -\contentsline {section}{\numberline {5.3}UEFI and persistence}{69}{section.5.3}% -\contentsline {subsection}{\numberline {5.3.1}Memory Management}{70}{subsection.5.3.1}% -\contentsline {subsection}{\numberline {5.3.2}File System Management}{70}{subsection.5.3.2}% -\contentsline {subsection}{\numberline {5.3.3}Device Drivers}{70}{subsection.5.3.3}% -\contentsline {subsection}{\numberline {5.3.4}Power Management}{70}{subsection.5.3.4}% -\contentsline {section}{\numberline {5.4}Intel and AMD: control beyond the OS}{70}{section.5.4}% -\contentsline {section}{\numberline {5.5}The OS as a virtualized environment}{71}{section.5.5}% -\contentsline {chapter}{Conclusion}{72}{chapter*.4}% -\contentsline {chapter}{Bibliography}{73}{chapter*.4}% -\contentsline {chapter}{GNU Free Documentation License}{80}{chapter*.6}% +\contentsline {subsubsection}{\numberline {4.3.1.1}Details on the DQS training function}{41}{subsubsection.4.3.1.1}% +\contentsline {subsubsection}{\numberline {4.3.1.2}Details on the write leveling implementation}{43}{subsubsection.4.3.1.2}% +\contentsline {subsubsection}{\numberline {4.3.1.3}Details on the write leveling implementation}{44}{subsubsection.4.3.1.3}% +\contentsline {subsection}{\numberline {4.3.2}Write Leveling on AMD Fam15h G34 Processors with RDIMMs}{44}{subsection.4.3.2}% +\contentsline {subsubsection}{\numberline {4.3.2.1}Details on the DQS position training function}{45}{subsubsection.4.3.2.1}% +\contentsline {subsubsection}{\numberline {4.3.2.2}Details on the DQS receiver training function}{48}{subsubsection.4.3.2.2}% +\contentsline {subsection}{\numberline {4.3.3}Potential enhancements}{50}{subsection.4.3.3}% +\contentsline {subsubsection}{\numberline {4.3.3.1}DQS receiver training}{50}{subsubsection.4.3.3.1}% +\contentsline {subsubsection}{\numberline {4.3.3.2}Write leveling}{52}{subsubsection.4.3.3.2}% +\contentsline {subsection}{\numberline {4.3.4}DQS position training}{54}{subsection.4.3.4}% +\contentsline {subsection}{\numberline {4.3.5}On a wider scale...}{56}{subsection.4.3.5}% +\contentsline {subsubsection}{\numberline {4.3.5.1}Saving training values in NVRAM}{56}{subsubsection.4.3.5.1}% +\contentsline {subsubsection}{\numberline {4.3.5.2}A seedless DQS position training algorithm}{57}{subsubsection.4.3.5.2}% +\contentsline {chapter}{\numberline {5}Virtualization of the operating system through firmware abstraction}{59}{chapter.5}% +\contentsline {section}{\numberline {5.1}ACPI and abstraction of hardware control}{59}{section.5.1}% +\contentsline {section}{\numberline {5.2}SMM as a hidden execution layer}{60}{section.5.2}% +\contentsline {section}{\numberline {5.3}UEFI and persistence}{60}{section.5.3}% +\contentsline {subsection}{\numberline {5.3.1}Memory Management}{61}{subsection.5.3.1}% +\contentsline {subsection}{\numberline {5.3.2}File System Management}{61}{subsection.5.3.2}% +\contentsline {subsection}{\numberline {5.3.3}Device Drivers}{61}{subsection.5.3.3}% +\contentsline {subsection}{\numberline {5.3.4}Power Management}{61}{subsection.5.3.4}% +\contentsline {section}{\numberline {5.4}Intel and AMD: control beyond the OS}{61}{section.5.4}% +\contentsline {section}{\numberline {5.5}The OS as a virtualized environment}{62}{section.5.5}% +\contentsline {chapter}{Conclusion}{63}{chapter*.6}% +\contentsline {chapter}{Bibliography}{70}{chapter*.7}% +\contentsline {chapter}{Appendix: Long code listings}{71}{chapter*.8}% +\contentsline {chapter}{GNU General Public License version 2}{82}{chapter*.9}% +\contentsline {chapter}{GNU Free Documentation License}{87}{chapter*.10}% diff --git a/packages.tex b/packages.tex index 2cd770d..e5b2764 100644 --- a/packages.tex +++ b/packages.tex @@ -41,7 +41,7 @@ \addtolength{\skip\footins}{0.6pc} \renewcommand*\footnoterule{} %Footnode separator line -\def\siecle#1{\textsc{\romannumeral #1}\textsuperscript{e}~siècle} +%\def\siecle#1{\textsc{\romannumeral #1}\textsuperscript{e}~siècle} \renewcommand{\cftsecleader}{\cftdotfill{\cftdotsep}} %places dots on sections lines as well