Add SPI explanation

hardware_init_review.tex

@@ -614,8 +614,11 @@
         contains specialized chips for managing input/output operations and
         system health monitoring. The WINBOND W83667HG-A Super I/O chip handles
         traditional I/O functions such as legacy serial and parallel ports,
-        keyboard, and mouse interfaces, but also the SPI chip that contains the
-        firmware \cite{winbond}. Meanwhile, the Nuvoton W83795G/ADG Hardware
+        keyboard, and mouse interfaces, but also the SPI chip (Serial Peripheral
+        Interface, a synchronous serial communication protocol primarily used
+        to communicate between microcontrollers and peripheral devices like
+        sensors or memory devices) that contains the firmware \cite{winbond}.
+        Meanwhile, the Nuvoton W83795G/ADG Hardware
         Monitor oversees the system’s health by monitoring temperatures,
         voltages, and fan speeds, ensuring that the system operates within
         safe parameters \cite{nuvoton}. On the KGPE-D16, access to the Super
@@ -992,7 +995,8 @@
             The \path{bootblock_soc_early_init} function is called to
             initialize the I2C bus of the southbridge. The
             \path{bootblock_fch_early_init} function is invoked to
-            initialize the SPI buses (including the one for the ROM) and the
+            initialize the SPI buses (Serial Peripheral Interface,
+            allowing to access the chip that contains the ROM) and the
             serial and "legacy" buses of the southbridge. The CMOS clock is then
             initialized, followed by the pre-initialization of the serial
             console.