Add SPI explanation
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@ -614,8 +614,11 @@
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contains specialized chips for managing input/output operations and
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system health monitoring. The WINBOND W83667HG-A Super I/O chip handles
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traditional I/O functions such as legacy serial and parallel ports,
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keyboard, and mouse interfaces, but also the SPI chip that contains the
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firmware \cite{winbond}. Meanwhile, the Nuvoton W83795G/ADG Hardware
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keyboard, and mouse interfaces, but also the SPI chip (Serial Peripheral
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Interface, a synchronous serial communication protocol primarily used
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to communicate between microcontrollers and peripheral devices like
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sensors or memory devices) that contains the firmware \cite{winbond}.
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Meanwhile, the Nuvoton W83795G/ADG Hardware
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Monitor oversees the system’s health by monitoring temperatures,
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voltages, and fan speeds, ensuring that the system operates within
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safe parameters \cite{nuvoton}. On the KGPE-D16, access to the Super
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@ -992,7 +995,8 @@
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The \path{bootblock_soc_early_init} function is called to
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initialize the I2C bus of the southbridge. The
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\path{bootblock_fch_early_init} function is invoked to
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initialize the SPI buses (including the one for the ROM) and the
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initialize the SPI buses (Serial Peripheral Interface,
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allowing to access the chip that contains the ROM) and the
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serial and "legacy" buses of the southbridge. The CMOS clock is then
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initialized, followed by the pre-initialization of the serial
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console.
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