commit eaf7174c6c7b8535c296dc2bd174600561751f08 Author: neox Date: Wed Jul 24 17:00:17 2024 +0200 Chapter 1: cleared diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..1546d59 --- /dev/null +++ b/Makefile @@ -0,0 +1,23 @@ +.PHONY: clean distclean all bibliography + +all: hardware_init_review.pdf + +clean: + rm -rf *.log *.bak *.out *.xml *.gz *.aux *.bcf *.blg + +distclean: clean + rm -rf *.bbl *.pdf *.toc + +bibliography: hardware_init_review.bbl + +hardware_init_review.bbl: bibliographie.bib hardware_init_review.bcf + biber hardware_init_review + +hardware_init_review.bcf: + xelatex hardware_init_review.tex + +hardware_init_review.toc: + xelatex hardware_init_review.tex + +hardware_init_review.pdf: hardware_init_review.bbl hardware_init_review.toc + xelatex hardware_init_review.tex diff --git a/acronymes.tex b/acronymes.tex new file mode 100644 index 0000000..4a6102f --- /dev/null +++ b/acronymes.tex @@ -0,0 +1,2 @@ +\newacronym{Insee}{Insee}{Institut national de la statistique et des études économiques} +\newacronym{Tracfin}{Tracfin}{Traitement du renseignement et action contre les circuits financiers clandestins} \ No newline at end of file diff --git a/bibliographie.bib b/bibliographie.bib new file mode 100644 index 0000000..3f8ab23 --- /dev/null +++ b/bibliographie.bib @@ -0,0 +1,452 @@ +@misc{gnuboot, +author = "GNU Boot project maintainers", +title = "GNU Boot --- Free your BIOS today!", +year = "2024", +url = "https://www.gnu.org/software/gnuboot/", +note = "[Online; accessed 7-May-2024]" +} + +@misc{gnuboot_status, +author = "GNU Boot project maintainers", +title = "GNU Boot --- Status", +year = "2024", +url = "https://www.gnu.org/software/gnuboot/web/status.html", +note = "[Online; accessed 7-May-2024]" +} + +@misc{gnu_wiki, +author = "{Wikipedia contributors}", +title = "GNU Project --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=GNU_Project&oldid=1205139455", +note = "[Online; accessed 7-May-2024]" +} + +@misc{fsf_wiki, +author = "{Wikipedia contributors}", +title = "Free Software Foundation --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=Free_Software_Foundation&oldid=1222269091", +note = "[Online; accessed 7-May-2024]" +} + +@misc{lip6_wiki, +author = "{Wikipedia contributors}", +title = "Laboratoire d'Informatique de Paris 6 --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=Laboratoire_d%27Informatique_de_Paris_6&oldid=1222525180", +note = "[Online; accessed 7-May-2024]" +} + +@misc{lip6_web, +author = "Sorbonne Université/CNRS", +title = "Laboratoire d'Informatique de Paris 6", +year = "2024", +url = "https://www.lip6.fr/", +note = "[Online; accessed 7-May-2024]" +} + +@misc{lip6_annuaire, +author = "Sorbonne Université/CNRS", +title = "Annuaire LIP6", +year = "2024", +url = "https://www.lip6.fr/recherche/resultat.php?keyword=&find=Rechercher+au+LIP6", +note = "[Online; accessed 7-May-2024]" +} + +@inbook{BKDG, +author = {AMD}, +number = {42301}, +year = {2013}, +month = {01}, +title = {BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 15h Models 00h-0Fh Processors Rev 3.14} +} + +@inbook{SR5690BDG, +author = {AMD}, +number = {43870}, +year = {2010}, +month = {11}, +title = {SR5690/5670/5650 BIOS Developer’s Guide 3.00} +} + +@inbook{SR5690RPR, +author = {AMD}, +number = {43872}, +year = {2012}, +month = {08}, +title = {SR5690/5670/5650 Register Programming Requirements 3.05} +} + +@article{numa, +author = {Lameter, Christoph}, +year = {2013}, +month = {07}, +pages = {}, +title = {NUMA (Non-Uniform Memory Access): An Overview}, +volume = {11}, +journal = {Queue}, +doi = {10.1145/2508834.2513149} +} + +@misc{micron_ddr3, +author = {Micron Technology Inc}, +year = {2008}, +number = {TN-41-02}, +title = {Technical Note: DDR3 ZQ Calibration} +} + +@misc{samsung_ddr3, +author = {Samsung Electronics Co. Ltd}, +year = {2011}, +month = {11}, +number = {TN-41-02}, +title = {DDR3 SDRAM Specification Rev 1.4} +} + +@misc{fs_wiki, +author = "{Wikipedia contributors}", +title = "Free software movement --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=Free_software_movement&oldid=1197710495", +note = "[Online; accessed 29-January-2024]" +} + +@misc{free_soft_wiki, +author = "{Wikipedia contributors}", +title = "Free software --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=Free_software&oldid=1196006316", +note = "[Online; accessed 30-January-2024]" +} + +@misc{4freedom_wiki, +author = "{Wikipedia contributors}", +title = "The Free Software Definition --- {Wikipedia}{,} The Free Encyclopedia", +year = "2023", +url = "https://en.wikipedia.org/w/index.php?title=The_Free_Software_Definition&oldid=1192713194", +note = "[Online; accessed 29-January-2024]" +} + +@misc{osd_wiki, +author = "{Wikipedia contributors}", +title = "The Open Source Definition --- {Wikipedia}{,} The Free Encyclopedia", +year = "2023", +url = "https://en.wikipedia.org/w/index.php?title=The_Open_Source_Definition&oldid=1191447775", +note = "[Online; accessed 30-January-2024]" +} + +@misc{gpl_wiki, +author = "{Wikipedia contributors}", +title = "GNU General Public License --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=GNU_General_Public_License&oldid=1199241605", +note = "[Online; accessed 30-January-2024]" +} + +@misc{gfdl_wiki, +author = "{Wikipedia contributors}", +title = "GNU Free Documentation License --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=GNU_Free_Documentation_License&oldid=1193649968", +note = "[Online; accessed 30-January-2024]" +} + +@misc{x86_wiki, +author = "{Wikipedia contributors}", +title = "X86 --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=X86&oldid=1221800539", +note = "[Online; accessed 7-May-2024]" +} + +@misc{seabios_wiki, +author = "{Wikipedia contributors}", +title = "SeaBIOS --- {Wikipedia}{,} The Free Encyclopedia", +year = "2023", +url = "https://en.wikipedia.org/w/index.php?title=SeaBIOS&oldid=1179465237", +note = "[Online; accessed 7-May-2024]" +} + +@misc{grub_wiki, +author = "{Wikipedia contributors}", +title = "GNU GRUB --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=GNU_GRUB&oldid=1217643156", +note = "[Online; accessed 7-May-2024]" +} + +@misc{ime_wiki, +author = "{Wikipedia contributors}", +title = "Intel Management Engine --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=Intel_Management_Engine&oldid=1216703991", +note = "[Online; accessed 7-May-2024]" +} + +@misc{psp_wiki, +author = "{Wikipedia contributors}", +title = "AMD Platform Security Processor --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=AMD_Platform_Security_Processor&oldid=1216563013", +note = "[Online; accessed 7-May-2024]" +} + +@misc{NDA_wiki, +author = "{Wikipedia contributors}", +title = "Non-disclosure agreement --- {Wikipedia}{,} The Free Encyclopedia", +year = "2023", +url = "https://en.wikipedia.org/w/index.php?title=Non-disclosure_agreement&oldid=1183749255", +note = "[Online; accessed 8-May-2024]" +} + +@misc{AGESA_wiki, +author = "{Wikipedia contributors}", +title = "AGESA --- {Wikipedia}{,} The Free Encyclopedia", +year = "2023", +url = "https://en.wikipedia.org/w/index.php?title=AGESA&oldid=1166805057", +note = "[Online; accessed 8-May-2024]" +} + +@misc{DDR3_wiki, +author = "{Wikipedia contributors}", +title = "DDR3 SDRAM --- {Wikipedia}{,} The Free Encyclopedia", +year = "2024", +url = "https://en.wikipedia.org/w/index.php?title=DDR3_SDRAM&oldid=1207641521", +note = "[Online; accessed 8-May-2024]" +} + +@misc{openbmc_wiki, +author = "{Wikipedia contributors}", +title = "OpenBMC --- {Wikipedia}{,} The Free Encyclopedia", +year = "2023", +url = "https://en.wikipedia.org/w/index.php?title=OpenBMC&oldid=1183698628", +note = "[Online; accessed 8-May-2024]" +} + +@misc{raptor_engineering, +author = "{Raptor Engineering LLC}", +title = "Raptor Engineering website", +year = "2009-2024", +url = "https://raptorengineering.com/", +note = "[Online; accessed 8-May-2024]" +} + +@misc{intel_me, + author = {{Intel Corporation}}, + title = {Intel Management Engine (Intel ME)}, + howpublished = {\url{https://www.intel.com/content/www/us/en/architecture-and-technology/intel-management-engine.html}}, + note = {Accessed: 2024-07-05} +} + +@misc{amd_psp, + author = {{AMD}}, + title = {AMD Platform Security Processor (PSP)}, + howpublished = {\url{https://www.amd.com/en/technologies/security}}, + note = {Accessed: 2024-07-05} +} + +@misc{acpi_spec, + author = {ACPI}, + title = {ACPI Specification}, + howpublished = {\url{https://www.acpi.info/spec.htm}}, + note = {Accessed: 2024-07-05} +} + +@article{memory_training, + author = {Author Names}, + title = {Title of the Paper on Memory Training Algorithms}, + journal = {Journal Name}, + year = {Year}, + volume = {Volume}, + number = {Number}, + pages = {Pages} +} + +@article{virtualization_firmware, + author = {Author Names}, + title = {Title of the Paper on Hardware Virtualization and Firmware}, + journal = {Journal Name}, + year = {Year}, + volume = {Volume}, + number = {Number}, + pages = {Pages} +} + +@misc{asus_kgpe_d16_manual, + author = {Asus}, + title = {Asus KGPE-D16 Mainboard Documentation and User Manuals}, + howpublished = {\url{https://www.asus.com/Commercial-Servers-Workstations/KGPE-D16/HelpDesk_Manual/}}, + note = {Accessed: 2024-07-05} +} + +@misc{ibm_pc, + author = {IBM Archives}, + title = {IBM Personal Computer}, + howpublished = {\url{https://www.ibm.com/history/personal-computer}}, + year = 2024 +} + +@misc{uefi, + author = {UEFI Forum}, + title = {Unified Extensible Firmware Interface}, + howpublished = {\url{https://uefi.org/}}, + year = 2024 +} + +@misc{grewal_ibm_pc, + author = {Jimmy Grewal}, + title = {The Creation of the IBM PC}, + howpublished = {Armonk Institute}, + year = 2024 +} + +@misc{computer_history_museum, + author = {Computer History Museum}, + title = {The Evolution of the BIOS}, + howpublished = {\url{https://computerhistory.org/}}, + year = 2024 +} + +@book{rosenberg1994open, + title={Open architecture computer systems}, + author={Rosenberg, Ronald H}, + year={1994}, + publisher={IEEE Computer Society Press} +} + +@inproceedings{richter2011bios, + title={BIOS and UEFI firmware analysis}, + author={Richter, Felix and Wressnegger, Christian and Schwenk, Thorsten and Muller, Thorsten}, + booktitle={Proceedings of the 6th ACM Symposium on Information, Computer and Communications Security}, + pages={7--16}, + year={2011} +} + +@misc{intel_uefi, + author = {Intel Corporation}, + title = {Unified Extensible Firmware Interface (UEFI)}, + year = {2020}, + howpublished = {\url{https://www.intel.com/content/www/us/en/architecture-and-technology/unified-extensible-firmware-interface.html}}, +} + +@misc{uefi_spec, + author = {UEFI Forum}, + title = {UEFI Specification}, + year = {2021}, + howpublished = {\url{https://uefi.org/specifications}}, +} + +@misc{microsoft_uefi, + author = {Microsoft Corporation}, + title = {UEFI Firmware}, + year = {2019}, + howpublished = {\url{https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/uefi-firmware}}, +} + +@misc{smith_2017, + author = {Smith, R.}, + title = {UEFI vs. BIOS: What’s the Difference?}, + year = {2017}, + howpublished = {\url{https://www.techradar.com/news/uefi-vs-bios-whats-the-difference}}, +} + +@misc{anderson_2018, + author = {Anderson, T.}, + title = {BIOS vs. UEFI: Understanding the Modern Boot Environment}, + year = {2018}, + howpublished = {\url{https://www.pcworld.com/article/3171322/bios-vs-uefi-understanding-the-modern-boot-environment.html}}, +} + +@article{wolf2006, + author = {Wolf, K.}, + title = {Modern Boot Firmware: Moving from BIOS to UEFI}, + journal = {IEEE Computer Society}, + year = {2006}, + volume = {39}, + number = {5}, + pages = {42-47}, + doi = {10.1109/MC.2006.156} +} + +@book{russinovich2012, + author = {Russinovich, M. E. and Solomon, D. A. and Ionescu, A.}, + title = {Windows Internals, Part 1}, + year = {2012}, + publisher = {Microsoft Press}, + edition = {6th}, +} + +@article{shin2011, + author = {Shin, M. and Lee, K.}, + title = {Design and Implementation of a UEFI-Compliant Firmware Platform}, + journal = {Journal of Computer Science and Technology}, + year = {2011}, + volume = {26}, + number = {2}, + pages = {219-230}, + doi = {10.1007/s11390-011-0121-8} +} + +@article{chang2013, + author = {Chang, H. and Smith, A.}, + title = {UEFI Secure Boot in Modern Computing}, + journal = {International Journal of Information Security}, + year = {2013}, + volume = {12}, + number = {3}, + pages = {231-241}, + doi = {10.1007/s10207-013-0191-1} +} + +@article{acmcs2015, + author = {ACMCS}, + title = {The Evolution of Firmware: BIOS to UEFI}, + journal = {ACM Computing Surveys}, + year = {2015}, + volume = {47}, + number = {4}, + pages = {55-61}, + doi = {10.1145/2766462} +} + +@misc{coreboot, + author = {coreboot project}, + title = {coreboot: Open Source Firmware}, + howpublished = {\url{https://www.coreboot.org/}}, + note = {Accessed: 2024-07-23} +} + +@inproceedings{rudolph2007, + author = {Rudolph, M.}, + title = {LinuxBIOS: Open Source Boot Firmware}, + booktitle = {Proceedings of the Linux Symposium}, + year = {2007}, + pages = {159-167}, + url = {https://ols.fedoraproject.org/OLS/Reprints-2007/rudolph-Reprint.pdf} +} + +@misc{coreboot_payloads, + author = {coreboot project}, + title = {coreboot Payloads}, + howpublished = {\url{https://www.coreboot.org/Payloads}}, + note = {Accessed: 2024-07-23} +} + +@article{coreboot_challenges, + author = {Minnich, R. and Hendricks, E.}, + title = {Challenges and Progress in Coreboot Development}, + journal = {Journal of Open Source Software}, + year = {2018}, + volume = {3}, + number = {29}, + pages = {1-6}, + doi = {10.21105/joss.00429} +} + +@misc{blobs, + author = "GNU Boot project maintainers", + title = {Frequently Asked Questions}, + howpublished = {\url{https://www.gnu.org/software/gnuboot/web/faq.html}}, + note = {Accessed: 2024-07-23} +} \ No newline at end of file diff --git a/hardware_init_review..bbl b/hardware_init_review..bbl new file mode 100644 index 0000000..e69de29 diff --git a/hardware_init_review.bbl b/hardware_init_review.bbl new file mode 100644 index 0000000..b137f83 --- /dev/null +++ b/hardware_init_review.bbl @@ -0,0 +1,1529 @@ +% $ biblatex auxiliary file $ +% $ biblatex bbl format version 3.2 $ +% Do not modify the above lines! +% +% This is an auxiliary file used by the 'biblatex' package. +% This file may safely be deleted. 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https://en.wikipedia.org/w/index.php?title=X86&oldid=1221800539 + \endverb + \verb{url} + \verb https://en.wikipedia.org/w/index.php?title=X86&oldid=1221800539 + \endverb + \endentry + \entry{wolf2006}{article}{} + \name{author}{1}{}{% + {{hash=e7ea35f3f0c3cf77495520fc0d8fdb22}{% + family={Wolf}, + familyi={W\bibinitperiod}, + given={K.}, + giveni={K\bibinitperiod}}}% + } + \strng{namehash}{e7ea35f3f0c3cf77495520fc0d8fdb22} + \strng{fullhash}{e7ea35f3f0c3cf77495520fc0d8fdb22} + \strng{bibnamehash}{e7ea35f3f0c3cf77495520fc0d8fdb22} + \strng{authorbibnamehash}{e7ea35f3f0c3cf77495520fc0d8fdb22} + \strng{authornamehash}{e7ea35f3f0c3cf77495520fc0d8fdb22} + \strng{authorfullhash}{e7ea35f3f0c3cf77495520fc0d8fdb22} + \field{sortinit}{W} + \field{sortinithash}{4315d78024d0cea9b57a0c6f0e35ed0d} + \field{labelnamesource}{author} + \field{labeltitlesource}{title} + \field{journaltitle}{IEEE Computer Society} + \field{number}{5} + \field{title}{Modern Boot Firmware: Moving from BIOS to UEFI} + \field{volume}{39} + \field{year}{2006} + \field{pages}{42\bibrangedash 47} + \range{pages}{6} + \verb{doi} + \verb 10.1109/MC.2006.156 + \endverb + \endentry + \enddatalist +\endrefsection +\endinput + diff --git a/hardware_init_review.pdf b/hardware_init_review.pdf new file mode 100644 index 0000000..95b1dac Binary files /dev/null and b/hardware_init_review.pdf differ diff --git a/hardware_init_review.tex b/hardware_init_review.tex new file mode 100644 index 0000000..11ddb34 --- /dev/null +++ b/hardware_init_review.tex @@ -0,0 +1,1049 @@ +\input{packages.tex} + +% setup things +\setcounter{secnumdepth}{4} +\setcounter{tocdepth}{4} +%\setcounter{secnumdepth}{4} + +% setup bibliography +\addbibresource{bibliographie.bib} + +% -------------------------------------------------------------------------------------- +\begin{document}{ +% -------------------------------------------------------------------------------------- + + +\sloppy % allow flexible margins +\input{titlepage.tex} % import titlepage +\newpage + +% -------------------------------------------------------------------------------------- +% License page +% -------------------------------------------------------------------------------------- + +\setcounter{page}{2} +\vspace*{\fill} % fill the page so that text is at the bottom + +This is Edition 0.0. \newline + +Copyright (C) 2024 Adrien 'neox' Bourmault \href{mailto:neox@gnu.org}{} \newline + +Permission is granted to copy, distribute and/or modify this document +under the terms of the GNU Free Documentation License, Version 1.3 +or any later version published by the Free Software Foundation; +with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. +A copy of the license is included in the section entitled "GNU +Free Documentation License". + +\newpage + +% Table of contents +\tableofcontents + +\newpage + +\chapter*{Abstract} + +\addcontentsline{toc}{chapter}{Abstract} + +The global trend is towards the scarcity of free software-compatible hardware, +and soon there will be no computer that will work without software domination +by big companies, especially involving BIOSes. A Basic Input Output System +(BIOS) was originally a set of low-level functions contained in the read-only +memory of a computer's mainboard, enabling it to perform basic operations when +powered up. However, the definition of a BIOS has evolved to include what used +to be known as Power On Self Test (POST) for the presence of peripherals, +allocating resources for them to avoid conflicts, and then handing over to an +operating system boot loader. Nowadays, the bulk of the BIOS work is the +initialization and training of RAM. This means, for example, initializing the +memory controller and optimizing timing and read/write voltage for optimal +performance, making the code complex, as its role is to optimize several +parallel buses operating at high speeds and shared by many CPU cores, and make +them act as a homogeneous whole. \\ + +This documentation is the product of a project hosted by the \textit{LIP6 laboratory} and supported by the \textit{GNU Boot Project} and the \textit{Free Software Foundation}, delves into the importance of firmware in the hardware initialization of modern computers. +It explores various aspects of firmware, such as Intel Management +Engine (ME), AMD Platform Security Processor (PSP), Advanced Configuration and +Power Interface (ACPI), and System Management Mode (SMM). Additionally, it +provides an in-depth look at memory initialization and training algorithms, +highlighting their critical role in system stability and performance. \\ + +Examples of the implementation in the Asus KGPE-D16 mainboard are presented, describing its hardware characteristics, topology, and the crucial role of firmware in its operation after the mainboard architecture is examined. +Practical examples illustrate the impact of firmware on hardware +initialization, memory optimization, resource allocation, power management, +and security. Specific algorithms used for memory training and their outcomes +are analyzed to demonstrate the complexity and importance of firmware in +achieving optimal system performance. \\ + +Furthermore, the article explores the relationship between firmware and +hardware virtualization, discussing how modern firmware supports and enhances +virtualized environments. Security considerations and future trends in +firmware development are also addressed, emphasizing the need for continued +research and advocacy for free software-compatible hardware. The article +concludes with a call to action, urging the development of libre +firmware solutions to ensure greater control and security in computing. + +\chapter{Introduction to firmware and BIOS evolution} + + \section{Historical context of BIOS} + + \subsection{Definition and origin} + + The BIOS (Basic Input/Output System) is firmware used to perform hardware + initialization during the booting process and to provide runtime services + for operating systems and programs. Being a critical component for the + startup of personal computers, acting as an intermediary between the + computer's hardware and its operating system, the BIOS is embedded on a + chip on the motherboard and is the first code that runs when a PC is + powered on. The concept of BIOS has its roots in the early days of personal + computing. It was first developed by IBM for their IBM PC, which was + introduced in 1981. The term BIOS itself was coined by Gary Kildall, who + developed the CP/M (Control Program for Microcomputers) operating system. + In CP/M, BIOS was used to describe a component that interfaced directly + with the hardware, allowing the operating system to be somewhat + hardware-independent. \newline + + IBM's implementation of BIOS became a de facto standard in the industry, + as it was part of the IBM PC's open architecture, which refers to the + design philosophy adopted by IBM when developing the IBM Personal Computer + (PC), introduced in 1981. This architecture is characterized by the use of + off-the-shelf components and publicly available specifications, which + allowed other manufacturers to create compatible hardware and software. + It was in fact a departure from the proprietary systems prevalent at + the time, where companies closely guarded their designs to maintain + control over the hardware and software ecosystem. + For example, IBM used the Intel 8088 CPU, a well-documented and widely + available processor, and also the Industry Standard Architecture (ISA) bus, + which defined how various components like memory, storage, and peripherals + communicated with the CPU. This open architecture allowed other + manufacturers to create IBM-compatible computers, also known as "clones", + which further popularized the BIOS concept. As a result, the IBM PC BIOS + set the stage for a standardized method of interacting with computer + hardware, which has evolved over the years but remains fundamentally the + same in principle. IBM also published detailed technical documentation at + that time, including circuit diagrams, BIOS listings, and interface + specifications. This transparency allowed other companies to understand and + replicate the IBM PC's functionality. + + \subsection{Functionalities and limitations} + + The Basic Input/Output System (BIOS) is a foundational firmware component + in early personal computers, responsible for initializing hardware and + booting the operating system. Developed as part of IBM's original PC + design, the BIOS provided essential functionalities. \newline + + When a computer is powered on, the BIOS executes a Power-On Self-Test + (POST), a diagnostic sequence that verifies the integrity and functionality + of critical hardware components such as the CPU, RAM, disk drives, + keyboard, and other peripherals. This process ensures that all essential + hardware components are operational before the system attempts to load the + operating system. If any issues are detected, the BIOS generates error + messages or beep codes to alert the user. + Following the successful completion of POST, the BIOS runs the bootstrap + loader, a small program that identifies the operating system's bootloader + on a storage device, such as a hard drive, floppy disk, or optical drive. + The bootstrap loader then transfers control to the OS bootloader, + initiating the process of loading the operating system into the computer's + memory and starting it. This step effectively bridges the gap between + hardware initialization and operating system execution. + The BIOS also provides a set of low-level software routines known as + interrupts. These routines enable software to perform basic input/output + operations, such as reading from the keyboard, writing to the display, and + accessing disk drives, without needing to manage the hardware directly. By + providing standardized interfaces for hardware components, the BIOS + simplifies software development and improves compatibility across different + hardware configurations. \newline + + Despite its essential role, the early BIOS had several limitations. + One significant limitation was its limited storage capacity. + Early BIOS firmware was stored in Read-Only Memory (ROM) chips with very + limited storage, often just a few kilobytes. This constrained the + complexity and functionality of the BIOS, limiting it to only the most + essential tasks needed to start the system and provide basic hardware + control. The original BIOS was also non-extensible. ROM chips were + typically soldered onto the motherboard, making updates difficult and + costly. Bug fixes, updates for new hardware support, or enhancements + required replacing the ROM chip, leading to challenges in maintaining and + upgrading systems. Furthermore, the early BIOS was tailored for the + specific hardware configurations of the initial IBM PC models, which + included a limited set of peripherals and expansion options. As new + hardware components and peripherals were developed, the BIOS often needed + to be updated to support them, which was not always feasible or timely. + Performance bottlenecks were another limitation. The BIOS provided basic + input/output operations that were often slower than direct hardware access + methods. For example, disk I/O operations through BIOS interrupts were + slower compared to later direct access methods provided by operating + systems, resulting in performance bottlenecks, especially for + disk-intensive operations. This inflexibility restricts the ability to + support new hardware and technologies efficiently. + Early BIOS implementations also had minimal security features. There were + no mechanisms to verify the integrity of the BIOS code or to protect + against unauthorized modifications, leaving systems vulnerable to attacks + that could alter the BIOS and potentially compromise the entire system, + such as rootkits and firmware viruses. + + Added to that, the traditional BIOS operates in 16-bit real mode, a + constraint that limits the amount of code and memory it can address. This + limitation hinders the performance and complexity of firmware, making + it less suitable for modern computing needs \cite{intel_uefi}. + Additionally, BIOS relies on the Master Boot Record (MBR) partitioning + scheme, which supports a maximum disk size of 2 terabytes and allows only + four primary partitions \cite{uefi_spec}\cite{russinovich2012}. + This constraint has become a + significant drawback as storage capacities have increased. + Furthermore, the traditional BIOS has limited flexibility and is + challenging to update or extend. This inflexibility restricts the ability + to support new hardware and technologies efficiently + \cite{smith_2017}\cite{acmcs2015}. + + \section{Modern BIOS and UEFI} + + \subsection{Transition from traditional BIOS to UEFI (Unified Extensible Firmware Interface)} + + All the limitations listed earlier have necessitated a transition to a more + modern firmware interface, designed to address the shortcomings of the + traditional BIOS. This section delves into the historical context of this + shift, the driving factors behind it, and the advantages UEFI offers over + the traditional BIOS. + + The development of UEFI began in the mid-1990s as part of the Intel Boot + Initiative, which aimed to modernize the boot process and overcome the + limitations of the traditional BIOS. By 2005, the Unified EFI Forum, a + consortium of technology companies including Intel, AMD, and Microsoft, + had formalized the UEFI specification \cite{uefi_spec}. UEFI was designed + to address the shortcomings of the traditional BIOS, providing several key + improvements. \newline + + One of the most significant advancements of UEFI is its support for 32-bit + and 64-bit modes, allowing it to address more memory and run more complex + firmware programs. This capability enables UEFI to handle the increased + demands of modern hardware and software \cite{intel_uefi}\cite{shin2011}. + Additionally, UEFI uses the GUID Partition Table (GPT) instead of the MBR, + supporting disks larger than 2 terabytes and allowing for a nearly + unlimited number of partitions + \cite{microsoft_uefi}\cite{russinovich2012}. + Improved boot performance is another driving factor. UEFI provides faster + boot times compared to the traditional BIOS, thanks to its efficient + hardware and software initialization processes. This improvement is + particularly beneficial for systems with complex hardware configurations, + where quick boot times are essential \cite{intel_uefi}. + UEFI's modular architecture makes it more extensible and easier to update + compared to the traditional BIOS. This design allows for the addition of + drivers, applications, and other components without requiring a complete + firmware overhaul, providing greater flexibility and adaptability to new + technologies \cite{smith_2017}\cite{acmcs2015}. UEFI also includes enhanced + security features such as \textit{Secure Boot}, which ensures that only + trusted software can be executed during the boot process, thereby + protecting the system from unauthorized modifications and malware + \cite{anderson_2018}\cite{chang2013}. \newline + + The industry-wide support and standardization of UEFI have accelerated its + adoption across various platforms and devices. Major industry players, + including Intel, AMD, and Microsoft, have adopted UEFI as the new standard + for firmware interfaces, ensuring broad compatibility and interoperability + \cite{uefi_spec}. + + \subsection{An other way with coreboot} + + While UEFI has become the dominant firmware interface for modern computing + systems, it is not without its critics. Some of the primary concerns about + UEFI include its complexity, potential security vulnerabilities, and the + degree of control it provides to hardware manufacturers over the boot + process. As an alternative to UEFI, coreboot offers a different approach to + firmware that aims to address some of these concerns and continue the + evolution of BIOS. + \textit{coreboot}, originally known as LinuxBIOS, is a free firmware + project + initiated in 1999 by Ron Minnich and his team at the Los Alamos National + Laboratory. The project's primary goal was to create a fast, lightweight, + and flexible firmware solution that could initialize hardware and boot + operating systems quickly, while remaining transparent and + auditable\cite{coreboot}. \newline + + One of the main advantages of \textit{coreboot} over UEFI is its + simplicity. + \textit{coreboot} is designed to perform only the minimal tasks required to + initialize hardware and pass control to a payload, such as a bootloader or + operating system kernel. This minimalist approach reduces the attack + surface and potential for security vulnerabilities, as there is less code + that could be exploited by malicious actors \cite{rudolph2007}. + Another significant benefit of \textit{coreboot} is its libre nature. + Unlike + UEFI, which is controlled by a consortium of hardware and software vendors, + \textit{coreboot}'s source code is freely available and can be audited, + modified, + and improved by anyone. This transparency ensures that security researchers + and developers can review the code for potential vulnerabilities and + contribute to its improvement, fostering a community-driven approach to + firmware development\cite{coreboot}. + \textit{coreboot} also supports a wide range of payloads, allowing users to + customize their boot process to suit their specific needs. Popular payloads + include SeaBIOS, which provides legacy BIOS compatibility, and Tianocore, + which offers UEFI functionality within the \textit{coreboot} framework. + This + flexibility allows \textit{coreboot} to be used in a variety of + environments, from + embedded systems to high-performance servers\cite{coreboot_payloads}. + \newline + + Despite its advantages, \textit{coreboot} is not without its challenges. + The project + relies heavily on community contributions, and support for new hardware + often lags behind that of UEFI. Additionally, the minimalist design of + \textit{coreboot} means that some advanced features provided by UEFI, such + as Secure + Boot, are not available by default. However, the \textit{coreboot} + community + continues to work on adding new features and improving compatibility with + modern hardware\cite{coreboot_challenges}. + However, it's important to note that \textit{coreboot} is not entirely free + in all + aspects. Many modern processors and chipsets require proprietary binary + blobs for certain functionalities, such as memory initialization and + hardware management. These blobs are necessary for \textit{coreboot} to + function + correctly on a wide range of hardware, but they compromise the goal of + having a fully free firmware one day\cite{blobs}. + To address these concerns, the GNU Project has developed GNU Boot, a + fully free distribution of firmware, including \textit{coreboot}, that aims + to be + entirely free by avoiding the use of proprietary binary blobs. GNU Boot is + committed to using only free software for all aspects of firmware, making + it a preferred choice for users and organizations that prioritize software + freedom and transparency\cite{gnuboot}. + + \section{Shift in firmware responsibilities} + + Initially, we saw that the BIOS's primary function was to perform the + Power-On Self-Test (POST), a basic diagnostic testing process to check the + system's hardware components and ensure they were functioning correctly. + This included verifying the CPU, memory, and essential peripherals before + passing control to the operating system's bootloader. This process was + relatively simple, given the limited capabilities and straightforward + architecture of early computer systems\cite{smith_2017}. As computer + systems advanced, particularly with the advent of more sophisticated memory + technologies, the role of the BIOS expanded significantly. An example is + that modern memory modules operate at much higher speeds and capacities + than their predecessors, requiring precise configuration to ensure + stability and optimal performance. + We'll see in following sections how memory is taken care by firmware, + since the memory controller, a critical component in modern computer + systems, manages the data flow between the processor and memory modules. + Firmware then plays a crucial role in configuring this controller + during the boot process. This configuration includes setting memory + frequencies, voltage levels, and timing parameters to match the + specifications of the installed memory\cite{uefi_spec}. + The enhanced role of firmware in memory training and optimization directly + impacts system performance and stability. For example, overclocking + involves configuring the system to run at higher speeds than + manufacturer-specified limits. Firmware plays a key role in enabling + and managing overclocking, particularly for the memory subsystem. By + allowing adjustments to memory frequencies, voltages, and timings, it + provides tools for performance tuning while including safeguards to manage + the risks of instability and hardware damage \cite{anderson_2018}. + +\chapter{Characteristics of Asus KGPE-D16 Mainboard} + + \section{Overview of Asus KGPE-D16 Hardware} + \begin{itemize} + \item Description of the mainboard's hardware components + \begin{itemize} + \item CPU: Support for AMD Opteron 6000 series processors + \item RAM: 16 DDR3 DIMM slots supporting up to 256GB of memory + \item Expansion Slots: Multiple PCIe slots for expandability + \item Storage: SATA ports and potential for RAID configurations + \item Networking: Integrated dual gigabit Ethernet ports + \item Other Peripherals: USB ports, audio outputs, and additional I/O ports + \end{itemize} + \item Topology and Layout + \begin{itemize} + \item Physical layout of the mainboard + \item Placement of key components and their interactions + \item Cooling and power distribution + \end{itemize} + \end{itemize} + + \section{Firmware's Role in Asus KGPE-D16} + \begin{itemize} + \item Initial hardware setup + \item Memory training and optimization + \item Resource allocation and conflict resolution + \item Power management and efficiency + \item Security features and updates + \end{itemize} + +\chapter{Key Components in Modern Firmware} + + \section{Advanced Configuration and Power Interface (ACPI)} + \begin{itemize} + \item Detailed explanation of ACPI + \item Role in power management and system configuration + \item Implementation in modern operating systems + \item \textbf{Asus KGPE-D16 Example}: ACPI utilization in power management and device configuration on the mainboard + \end{itemize} + + \section{System Management Mode (SMM)} + \begin{itemize} + \item Definition and significance + \item How SMM enhances system security + \item Examples of SMM applications in real-world systems + \item \textbf{Asus KGPE-D16 Example}: SMM features and their impact on system security and functionality in the KGPE-D16 + \end{itemize} + + \section{AMD Platform Security Processor (PSP) and Intel Management Engine (ME)} + \begin{itemize} + \item Overview and purpose + \item Security implications, concerns and controversies + \item Interaction with system firmware + \item Differences between Intel ME and AMD PSP + \end{itemize} + +\chapter{Memory Initialization and Training Algorithms} + + \section{Importance of Memory Initialization} + \begin{itemize} + \item Steps involved in initializing the memory controller + \item Critical role in system stability and performance + \item \textbf{Asus KGPE-D16 Example}: Memory initialization process on the KGPE-D16 mainboard + \end{itemize} + + Memory training involves several steps: + 1. **Detection and Initialization**: The BIOS detects the installed memory + modules, determining their size, speed, and type. + 2. **Configuration and Timing Setup**: The BIOS configures the memory + controller settings, including timings for memory access such as CAS + latency, RAS to CAS delay, and other parameters \cite{intel_uefi}. + 3. **Training and Calibration**: The BIOS performs tests and adjustments to + calibrate the memory system, ensuring stable operation at optimal speeds by + adjusting signal voltages and testing data integrity \cite{wolf2006}. + + These steps are crucial for modern systems, where improper memory + configuration can lead to instability, data corruption, or suboptimal + performance. + + Memory timings, such as CAS latency, RAS to CAS delay, and others, must be + finely tuned to ensure optimal performance. The BIOS uses a combination of + predefined profiles and dynamic adjustments to achieve the best balance + between speed and stability. Advanced timing optimization involves setting + these parameters to ensure that memory operations are performed with + minimal latency and maximum throughput \cite{russinovich2012}. + + + \section{Memory Training Algorithms} + \begin{itemize} + \item Techniques used for training memory + \item Optimization of timings and voltage settings + \item Challenges in multi-core CPU environments + \item \textbf{Asus KGPE-D16 Example}: Specific algorithms used for memory training in the mainboard and their performance outcomes + \end{itemize} + + To optimize memory performance, the BIOS employs various training + algorithms and calibration techniques. These methods test the memory under + different conditions and make necessary adjustments to improve stability + and efficiency. Key techniques include voltage adjustments, data integrity + testing, and signal timing calibration \cite{shin2011}. + + Voltage adjustments involve tweaking the power supplied to the memory + modules to ensure reliable operation. Data integrity testing checks that + data can be accurately read and written, while signal timing calibration + fine-tunes the delays between different memory operations to minimize + latency. + + \section{Practical Examples} + \begin{itemize} + \item Real-world scenarios where firmware played a crucial role in system performance + \item Analysis of firmware updates and their impact on the KGPE-D16 mainboard + \item User experiences and testimonials highlighting the importance of firmware + \item \textbf{Asus KGPE-D16 Example}: Specific case studies and firmware updates for the mainboard + \end{itemize} + +\chapter{Firmware and Hardware Virtualization} + + \section{Introduction to Hardware Virtualization} + \begin{itemize} + \item Definition and purpose of virtualization + \item How firmware interacts with virtualized environments + \item \textbf{Asus KGPE-D16 Example}: Virtualization capabilities and performance on the mainboard + \end{itemize} + + \section{Role of BIOS/UEFI in Virtualization} + \begin{itemize} + \item Initialization and configuration for virtual machines + \item Resource allocation and management + \item \textbf{Asus KGPE-D16 Example}: BIOS/UEFI settings and their impact on virtualization efficiency on the KGPE-D16 + \end{itemize} + + \section{Security and freedom considerations} + \begin{itemize} + \item Security risks associated with virtualization + \item Measures taken by firmware to mitigate risks + \item \textbf{Asus KGPE-D16 Example}: Security measures implemented in the mainboard's firmware to support secure virtualization + \end{itemize} + + \section{Future Trends in Firmware and Virtualization} + \begin{itemize} + \item Emerging advancements and their impact on firmware + \item Predictions for the evolution of BIOS/UEFI in virtualization + \item \textbf{Asus KGPE-D16 Example}: Potential future firmware updates and their expected impact on the mainboard's virtualization capabilities + \end{itemize} + +\chapter*{Conclusion} +\addcontentsline{toc}{chapter}{Conclusion} + + \section{Summary of Key Points} + \begin{itemize} + \item Recap of the evolution and current state of firmware + \item Importance of understanding modern BIOS functionalities + \item \textbf{Asus KGPE-D16 Example}: Summary of the mainboard's features and firmware contributions + \end{itemize} + + \section{Call for Action} + \begin{itemize} + \item Advocacy for free software-compatible hardware + \item Encouraging research and development in libre firmware solutions + \end{itemize} + +\newpage + +% Bibliography +\nocite{*} +\addcontentsline{toc}{chapter}{Bibliography} +\printbibliography + +\newpage + +\chapter*{\rlap{GNU Free Documentation License}} +\addcontentsline{toc}{chapter}{GNU Free Documentation License} + \begin{center} + + Version 1.3, 3 November 2008 + + + Copyright \copyright{} 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. + + \bigskip + + \texttt{} + + \bigskip + + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. +\end{center} + + +\begin{center} +{\bf\large Preamble} +\end{center} + +The purpose of this License is to make a manual, textbook, or other +functional and useful document ``free'' in the sense of freedom: to +assure everyone the effective freedom to copy and redistribute it, +with or without modifying it, either commercially or noncommercially. +Secondarily, this License preserves for the author and publisher a way +to get credit for their work, while not being considered responsible +for modifications made by others. + +This License is a kind of ``copyleft'', which means that derivative +works of the document must themselves be free in the same sense. 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CC-BY-SA on the same site at any time before August 1, 2009, +provided the MMC is eligible for relicensing. + + +\begin{center} +{\Large\bf ADDENDUM: How to use this License for your documents\par} +\end{center} + +To use this License in a document you have written, include a copy of +the License in the document and put the following copyright and +license notices just after the title page: + +\bigskip +\begin{quote} + Copyright \copyright{} YEAR YOUR NAME. + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license is included in the section entitled ``GNU + Free Documentation License''. +\end{quote} +\bigskip + +If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts, +replace the ``with \dots\ Texts.''\ line with this: + +\bigskip +\begin{quote} + with the Invariant Sections being LIST THEIR TITLES, with the + Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. +\end{quote} +\bigskip + +If you have Invariant Sections without Cover Texts, or some other +combination of the three, merge those two alternatives to suit the +situation. + +If your document contains nontrivial examples of program code, we +recommend releasing these examples in parallel under your choice of +free software license, such as the GNU General Public License, +to permit their use in free software. + +\end{document} diff --git a/hardware_init_review.toc b/hardware_init_review.toc new file mode 100644 index 0000000..9b04322 --- /dev/null +++ b/hardware_init_review.toc @@ -0,0 +1,31 @@ +\babel@toc {english}{}\relax +\contentsline {chapter}{Abstract}{4}{chapter*.1}% +\contentsline {chapter}{\numberline {1}Introduction to firmware and BIOS evolution}{5}{chapter.1}% +\contentsline {section}{\numberline {1.1}Historical context of BIOS}{5}{section.1.1}% +\contentsline {subsection}{\numberline {1.1.1}Definition and origin}{5}{subsection.1.1.1}% +\contentsline {subsection}{\numberline {1.1.2}Functionalities and limitations}{5}{subsection.1.1.2}% +\contentsline {section}{\numberline {1.2}Modern BIOS and UEFI}{6}{section.1.2}% +\contentsline {subsection}{\numberline {1.2.1}Transition from traditional BIOS to UEFI (Unified Extensible Firmware Interface)}{6}{subsection.1.2.1}% +\contentsline {subsection}{\numberline {1.2.2}An other way with coreboot}{7}{subsection.1.2.2}% +\contentsline {section}{\numberline {1.3}Shift in firmware responsibilities}{7}{section.1.3}% +\contentsline {chapter}{\numberline {2}Characteristics of Asus KGPE-D16 Mainboard}{9}{chapter.2}% +\contentsline {section}{\numberline {2.1}Overview of Asus KGPE-D16 Hardware}{9}{section.2.1}% +\contentsline {section}{\numberline {2.2}Firmware's Role in Asus KGPE-D16}{9}{section.2.2}% +\contentsline {chapter}{\numberline {3}Key Components in Modern Firmware}{10}{chapter.3}% +\contentsline {section}{\numberline {3.1}Advanced Configuration and Power Interface (ACPI)}{10}{section.3.1}% +\contentsline {section}{\numberline {3.2}System Management Mode (SMM)}{10}{section.3.2}% +\contentsline {section}{\numberline {3.3}AMD Platform Security Processor (PSP) and Intel Management Engine (ME)}{10}{section.3.3}% +\contentsline {chapter}{\numberline {4}Memory Initialization and Training Algorithms}{11}{chapter.4}% +\contentsline {section}{\numberline {4.1}Importance of Memory Initialization}{11}{section.4.1}% +\contentsline {section}{\numberline {4.2}Memory Training Algorithms}{11}{section.4.2}% +\contentsline {section}{\numberline {4.3}Practical Examples}{12}{section.4.3}% +\contentsline {chapter}{\numberline {5}Firmware and Hardware Virtualization}{13}{chapter.5}% +\contentsline {section}{\numberline {5.1}Introduction to Hardware Virtualization}{13}{section.5.1}% +\contentsline {section}{\numberline {5.2}Role of BIOS/UEFI in Virtualization}{13}{section.5.2}% +\contentsline {section}{\numberline {5.3}Security and freedom considerations}{13}{section.5.3}% +\contentsline {section}{\numberline {5.4}Future Trends in Firmware and Virtualization}{13}{section.5.4}% +\contentsline {chapter}{Conclusion}{14}{chapter*.2}% +\contentsline {section}{\numberline {5.5}Summary of Key Points}{14}{section.5.5}% +\contentsline {section}{\numberline {5.6}Call for Action}{14}{section.5.6}% +\contentsline {chapter}{Bibliography}{15}{section.5.6}% +\contentsline {chapter}{GNU Free Documentation License}{18}{chapter*.4}% diff --git a/images/coreboot_architecture.xopp b/images/coreboot_architecture.xopp new file mode 100644 index 0000000..91957bb Binary files /dev/null and b/images/coreboot_architecture.xopp differ diff --git a/images/diagramme_chipset.xopp b/images/diagramme_chipset.xopp new file mode 100644 index 0000000..8633f78 Binary files /dev/null and b/images/diagramme_chipset.xopp differ diff --git a/images/diagramme_dual_cpu_node.xopp b/images/diagramme_dual_cpu_node.xopp new file mode 100644 index 0000000..e1b944a Binary files /dev/null and b/images/diagramme_dual_cpu_node.xopp differ diff --git a/images/fig1_schema_basique.png b/images/fig1_schema_basique.png new file mode 100644 index 0000000..4f81bca Binary files /dev/null and b/images/fig1_schema_basique.png differ diff --git a/images/fig2_diagramme_chipset.png b/images/fig2_diagramme_chipset.png new file mode 100644 index 0000000..e749003 Binary files /dev/null and b/images/fig2_diagramme_chipset.png differ diff --git a/images/fig3_img_dual_processor_node.png b/images/fig3_img_dual_processor_node.png new file mode 100644 index 0000000..2e97483 Binary files /dev/null and b/images/fig3_img_dual_processor_node.png differ diff --git a/images/fig4_photo_die_opteron_comment.png b/images/fig4_photo_die_opteron_comment.png new file mode 100644 index 0000000..04f37e4 Binary files /dev/null and b/images/fig4_photo_die_opteron_comment.png differ diff --git a/images/fig7_routage_transaction_sp5100.png b/images/fig7_routage_transaction_sp5100.png new file mode 100644 index 0000000..f160521 Binary files /dev/null and b/images/fig7_routage_transaction_sp5100.png differ diff --git a/images/fig8_coreboot_architecture.png b/images/fig8_coreboot_architecture.png new file mode 100644 index 0000000..6d40f9e Binary files /dev/null and b/images/fig8_coreboot_architecture.png differ diff --git a/images/fig9_coreboot_stages.png b/images/fig9_coreboot_stages.png new file mode 100644 index 0000000..5e21ed0 Binary files /dev/null and b/images/fig9_coreboot_stages.png differ diff --git a/images/fig9_coreboot_stages.svg b/images/fig9_coreboot_stages.svg new file mode 100644 index 0000000..633924c --- /dev/null +++ b/images/fig9_coreboot_stages.svg @@ -0,0 +1,559 @@ + + + + + + + + + + + + + + + + + + + + time + coreboot - stages + + + + bootblock + + + + + romstage + + + + + verstage(optional) + + + + + postcar(x86 only) + + + + + ramstage + + + + + SMM(x86 only) + + + + + payload + + + + + Assembly + + + + + Cache-As-RAM + + + + + DRAM + + + + + C + + + + + ADA SPARK (x86 only) + + corebootsource languages + code/heapmemory location + + + + + + BL31(ARM only) + + Power on + + + + + + + diff --git a/images/sr5690_sp5100_interrupt.xopp b/images/sr5690_sp5100_interrupt.xopp new file mode 100644 index 0000000..4c507e2 Binary files /dev/null and b/images/sr5690_sp5100_interrupt.xopp differ diff --git a/packages.tex b/packages.tex new file mode 100644 index 0000000..2665457 --- /dev/null +++ b/packages.tex @@ -0,0 +1,48 @@ +% -*- coding: utf-8 -*- +% Preamble +\documentclass[french, 11pt]{report} + \usepackage[utf8]{inputenc} + \usepackage{url} + \usepackage{float} + \usepackage{fontspec} + \usepackage{hyperref} + \usepackage{setspace} + \usepackage[style=numeric]{biblatex} + \usepackage{tocloft} + \usepackage{titlesec} + \usepackage[T1]{fontenc} + \usepackage[english]{babel} + \usepackage{graphicx} + \usepackage{listings} + \usepackage{xcolor} + \usepackage{chngcntr} + \usepackage[a4paper, portrait, margin=1.45cm]{geometry} + \title{Titre du mémoire} + \author{Nom et prénom de l'auteur} + \date{\today} + +% Set parameters +\setcounter{page}{0} +\hypersetup{linktoc=all} + +\addtolength{\skip\footins}{0.6pc} +\renewcommand*\footnoterule{} %Footnode separator line + +\def\siecle#1{\textsc{\romannumeral #1}\textsuperscript{e}~siècle} + +\renewcommand{\cftsecleader}{\cftdotfill{\cftdotsep}} %places dots on sections lines as well + +\counterwithout{figure}{chapter} + +\cftsetindents{section}{0pt}{4em} +\cftsetindents{subsection}{10pt}{4em} +\cftsetindents{subsubsection}{20pt}{4em} +\cftsetindents{paragraph}{30pt}{4em} +\cftsetindents{subparagraph}{40pt}{4em} +\def\cftdotsep{1} +\cftsetpnumwidth{1em} + +\renewcommand{\cftchapafterpnum}{\vspace{\cftbeforechapskip}} +\renewcommand{\familydefault}{\sfdefault} + +\setlength\parindent{0pt} \ No newline at end of file diff --git a/titlepage.tex b/titlepage.tex new file mode 100644 index 0000000..3db81f5 --- /dev/null +++ b/titlepage.tex @@ -0,0 +1,43 @@ +% Titlepage +\begin{titlepage} + +\begin{center} +Faculté des Sciences et Ingénierie\\ +Master Informatique\\ +Systèmes Électroniques, Systèmes Informatiques +\end{center} + +\begin{center} +Laboratoire d'Informatique Paris 6 - CIAN +\end{center} + +\vspace{5.3 cm} + +\begin{center} +\Huge{{Hardware initialization of modern computers}} +\end{center} + +\vspace{0.1 cm} + +\begin{center} +\Large{A review on the importance of firmware in modern computing and a documentation on the Asus KGPE-D16 RAM initialization} \newline + +\large{August, 2024} +\end{center} + +\vspace{2.0 cm} + +%\begin{center} +%\scalebox{0.25}{\includegraphics{images/gnuboot.png}} +%\end{center} + +\vspace{10 cm} + +\begin{center} +\normalsize{Adrien 'neox' Bourmault (\href{mailto:neox@gnu.org}{neox@gnu.org})} +\end{center} + +\begin{center} +\normalsize{Under the supervision of Franck WAJSBÜRT (\href{mailto:franck.wajsburt@lip6.fr}{franck.wajsburt@lip6.fr})} +\end{center} +\end{titlepage}