39 lines
3.3 KiB
TeX
39 lines
3.3 KiB
TeX
\babel@toc {english}{}\relax
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\contentsline {chapter}{Abstract}{4}{chapter*.1}%
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\contentsline {chapter}{\numberline {1}Introduction to firmware and BIOS evolution}{5}{chapter.1}%
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\contentsline {section}{\numberline {1.1}Historical context of BIOS}{5}{section.1.1}%
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\contentsline {subsection}{\numberline {1.1.1}Definition and origin}{5}{subsection.1.1.1}%
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\contentsline {subsection}{\numberline {1.1.2}Functionalities and limitations}{6}{subsection.1.1.2}%
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\contentsline {section}{\numberline {1.2}Modern BIOS and UEFI}{7}{section.1.2}%
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\contentsline {subsection}{\numberline {1.2.1}Transition from traditional BIOS to UEFI (Unified Extensible Firmware Interface)}{7}{subsection.1.2.1}%
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\contentsline {subsection}{\numberline {1.2.2}An other way with \textit {coreboot}}{7}{subsection.1.2.2}%
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\contentsline {section}{\numberline {1.3}Shift in firmware responsibilities}{9}{section.1.3}%
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\contentsline {chapter}{\numberline {2}Characteristics of ASUS KGPE-D16 mainboard}{10}{chapter.2}%
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\contentsline {section}{\numberline {2.1}Overview of ASUS KGPE-D16 hardware}{11}{section.2.1}%
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\contentsline {section}{\numberline {2.2}Chipset}{12}{section.2.2}%
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\contentsline {section}{\numberline {2.3}Processors}{14}{section.2.3}%
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\contentsline {section}{\numberline {2.4}Baseboard Management Controller}{15}{section.2.4}%
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\contentsline {chapter}{\numberline {3}Key components in modern firmware [WIP]}{17}{chapter.3}%
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\contentsline {section}{\numberline {3.1}General structure of coreboot}{17}{section.3.1}%
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\contentsline {subsection}{\numberline {3.1.1}Bootblock stage}{18}{subsection.3.1.1}%
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\contentsline {subsection}{\numberline {3.1.2}Romstage}{18}{subsection.3.1.2}%
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\contentsline {subsection}{\numberline {3.1.3}Ramstage}{19}{subsection.3.1.3}%
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\contentsline {subsection}{\numberline {3.1.4}Payload}{19}{subsection.3.1.4}%
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\contentsline {section}{\numberline {3.2}Advanced Configuration and Power Interface}{19}{section.3.2}%
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\contentsline {section}{\numberline {3.3}System Management Mode}{20}{section.3.3}%
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\contentsline {section}{\numberline {3.4}AMD Platform Security Processor and Intel Management Engine}{21}{section.3.4}%
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\contentsline {chapter}{\numberline {4}Memory initialization and training algorithms [WIP]}{22}{chapter.4}%
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\contentsline {section}{\numberline {4.1}Importance of memory initialization}{22}{section.4.1}%
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\contentsline {section}{\numberline {4.2}Memory training algorithms}{22}{section.4.2}%
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\contentsline {section}{\numberline {4.3}Practical examples}{23}{section.4.3}%
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\contentsline {chapter}{\numberline {5}Firmware and hardware virtualization [WIP]}{24}{chapter.5}%
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\contentsline {section}{\numberline {5.1}Introduction to hardware virtualization}{24}{section.5.1}%
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\contentsline {section}{\numberline {5.2}Role of BIOS/UEFI in virtualization}{24}{section.5.2}%
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\contentsline {section}{\numberline {5.3}Security and freedom considerations}{24}{section.5.3}%
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\contentsline {section}{\numberline {5.4}Future trends in firmware and virtualization}{24}{section.5.4}%
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\contentsline {chapter}{Conclusion}{25}{chapter*.2}%
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\contentsline {section}{\numberline {5.5}Summary of key points}{25}{section.5.5}%
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\contentsline {section}{\numberline {5.6}Call for action}{25}{section.5.6}%
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\contentsline {chapter}{Bibliography}{26}{section.5.6}%
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\contentsline {chapter}{GNU Free Documentation License}{31}{chapter*.4}%
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