Keyboard in progress
This commit is contained in:
Adrien Bourmault
parent
dfb65fd199
commit
2d610e1ae6
20
Makefile
20
Makefile
|
|
@ -94,7 +94,7 @@ KernSources = libbuf/buf.c libbuf/bput.c \
|
|||
kernel/mm/heap.c kernel/mm/malloc.c \
|
||||
kernel/mm/gdt.c kernel/ps/sched.c \
|
||||
kernel/init/info.c kernel/init/ssp.c \
|
||||
kernel/cpu/rtc.c
|
||||
kernel/io/rtc.c kernel/io/keyb.c
|
||||
|
||||
LibCObj=$(patsubst %.c,$(KOBJDIR)/%.o,$(LibCSources))
|
||||
|
||||
|
|
@ -148,6 +148,24 @@ $(KOBJDIR)/kernel/cpu/idt.o: $(KALEIDDIR)/kernel/cpu/idt.c \
|
|||
@rm -f $@.1 $@.2
|
||||
@echo ${CL2}[$@] ${CL}Compiled.${CL3}
|
||||
|
||||
$(KOBJDIR)/kernel/io/keyb.o: $(KALEIDDIR)/kernel/io/keyb.c \
|
||||
$(KALEIDDIR)/kernel/io/keyb.asm $(INCLUDEDIR)/*/*.h | $(KOBJDIR)
|
||||
@mkdir -p $(shell dirname $@)
|
||||
@$(ASM) $(ASMFLAGS) $(KALEIDDIR)/kernel/io/keyb.asm -o $@.1
|
||||
@$(KCC) $< -o $@.2
|
||||
@$(LD) $(LDFLAGS) -r $@.1 $@.2 -o $@
|
||||
@rm -f $@.1 $@.2
|
||||
@echo ${CL2}[$@] ${CL}Compiled.${CL3}
|
||||
|
||||
$(KOBJDIR)/kernel/io/rtc.o: $(KALEIDDIR)/kernel/io/rtc.c \
|
||||
$(KALEIDDIR)/kernel/io/rtc.asm $(INCLUDEDIR)/*/*.h | $(KOBJDIR)
|
||||
@mkdir -p $(shell dirname $@)
|
||||
@$(ASM) $(ASMFLAGS) $(KALEIDDIR)/kernel/io/rtc.asm -o $@.1
|
||||
@$(KCC) $< -o $@.2
|
||||
@$(LD) $(LDFLAGS) -r $@.1 $@.2 -o $@
|
||||
@rm -f $@.1 $@.2
|
||||
@echo ${CL2}[$@] ${CL}Compiled.${CL3}
|
||||
|
||||
## MAIN MAKEFILE ------------------------------------------------------------- #
|
||||
|
||||
$(KOBJDIR)/%.o: %.c $(INCLUDEDIR)/*/*.h | $(KOBJDIR)
|
||||
|
|
|
|||
|
|
@ -92,10 +92,10 @@ void IdtRegisterIrq(void (*isr)(void), uchar irq, uchar flags);
|
|||
void IdtSetup(void);
|
||||
void IdtSetGate(uchar rank, ulong base, ushort selector, uchar flags);
|
||||
void IdtHandler(ulong intNo);
|
||||
static void DisablePIC(void);
|
||||
static void SendEOItoPIC(uchar isr);
|
||||
static void EnablePIC(void);
|
||||
void SendEOItoPIC(uchar isr);
|
||||
|
||||
extern void CpuIdtInit();
|
||||
extern void IdtInit();
|
||||
extern void isr0();
|
||||
extern void isr1();
|
||||
extern void isr2();
|
||||
|
|
|
|||
|
|
@ -39,11 +39,19 @@ IRQList_t irqList = { 0 };
|
|||
//
|
||||
void IdtRegisterIrq(void (*isr)(void), uchar irq, uchar flags)
|
||||
{
|
||||
uchar n = irqList.n;
|
||||
|
||||
KalAssert(idt[0].flags==0); // IDT uninitialized
|
||||
|
||||
irqList.entry[irqList.n].isr = isr;
|
||||
irqList.entry[irqList.n].irq = irq;
|
||||
irqList.entry[irqList.n].flags = flags;
|
||||
if ((n == 225)) // IRQs not filled
|
||||
KeStartPanic("[IdtRegisterIrq] Cannot register IRQ %c function %p !",
|
||||
irq,
|
||||
isr
|
||||
);
|
||||
|
||||
irqList.entry[n].isr = isr;
|
||||
irqList.entry[n].irq = irq;
|
||||
irqList.entry[n].flags = flags;
|
||||
irqList.n++;
|
||||
}
|
||||
|
||||
|
|
@ -53,7 +61,7 @@ void IdtRegisterIrq(void (*isr)(void), uchar irq, uchar flags)
|
|||
void IdtSetup(void)
|
||||
{
|
||||
// XXX detect the APIC with cpuid !
|
||||
DisablePIC();
|
||||
EnablePIC();
|
||||
|
||||
ushort codeSeg = (ushort)(ulong)BtLoaderInfo.codeSegment;
|
||||
|
||||
|
|
@ -104,7 +112,7 @@ void IdtSetup(void)
|
|||
}
|
||||
|
||||
// Load IDT
|
||||
CpuIdtInit();
|
||||
IdtInit();
|
||||
DebugLog("[IdtSetup] Initialized !\n");
|
||||
}
|
||||
|
||||
|
|
@ -128,39 +136,35 @@ void IdtSetGate(uchar rank, ulong base, ushort selector, uchar flags)
|
|||
}
|
||||
|
||||
//
|
||||
// Disables the PIC to activate the APIC
|
||||
// Enable and initializes the PIC to work correctly
|
||||
//
|
||||
static void DisablePIC(void)
|
||||
static void EnablePIC(void)
|
||||
{
|
||||
// Set ICW1
|
||||
// Set ICW1 - begin init of the PIC
|
||||
IoWriteByteOnPort(0x20, 0x11);
|
||||
IoWriteByteOnPort(0xa0, 0x11);
|
||||
|
||||
// Set ICW2 (IRQ base offsets)
|
||||
IoWriteByteOnPort(0x21, 0xe0);
|
||||
IoWriteByteOnPort(0xa1, 0xe8);
|
||||
IoWriteByteOnPort(0x21, 0x20); //0x20 is the first free interrupt
|
||||
IoWriteByteOnPort(0xa1, 0x28);
|
||||
|
||||
// Set ICW3
|
||||
IoWriteByteOnPort(0x21, 4);
|
||||
IoWriteByteOnPort(0xa1, 2);
|
||||
IoWriteByteOnPort(0x21, 0x0);
|
||||
IoWriteByteOnPort(0xa1, 0x0);
|
||||
|
||||
// Set ICW4
|
||||
IoWriteByteOnPort(0x21, 1);
|
||||
IoWriteByteOnPort(0xa1, 1);
|
||||
IoWriteByteOnPort(0x21, 0x1);
|
||||
IoWriteByteOnPort(0xa1, 0x1);
|
||||
|
||||
// Set OCW1 (interrupt masks)
|
||||
IoWriteByteOnPort(0x21, 0xff);
|
||||
IoWriteByteOnPort(0xa1, 0xff);
|
||||
|
||||
// ENABLING LOCAL APIC
|
||||
uint *val = (void*)0xfee000f0;
|
||||
*val |= (1<<8);
|
||||
}
|
||||
|
||||
//
|
||||
// Ends the current interrupt handling
|
||||
//
|
||||
static void SendEOItoPIC(uchar isr)
|
||||
void SendEOItoPIC(uchar isr)
|
||||
{
|
||||
if(isr >= 8)
|
||||
IoWriteByteOnPort(0xa0,0x20);
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
%include "kaleid/kernel/cpu/isr.inc"
|
||||
|
||||
global CpuIdtInit
|
||||
global IdtInit
|
||||
global divideByZero
|
||||
extern idtPtr
|
||||
extern IdtHandler
|
||||
|
|
@ -32,7 +32,7 @@ extern IdtHandler
|
|||
;;
|
||||
;; Loads the IDT
|
||||
;;
|
||||
CpuIdtInit:
|
||||
IdtInit:
|
||||
lidt [idtPtr]
|
||||
ret
|
||||
|
||||
|
|
|
|||
|
|
@ -1,40 +0,0 @@
|
|||
//----------------------------------------------------------------------------//
|
||||
// GNU GPL OS/K //
|
||||
// //
|
||||
// Desc: Interrupt related functions //
|
||||
// //
|
||||
// //
|
||||
// Copyright © 2018-2019 The OS/K Team //
|
||||
// //
|
||||
// This file is part of OS/K. //
|
||||
// //
|
||||
// OS/K is free software: you can redistribute it and/or modify //
|
||||
// it under the terms of the GNU General Public License as published by //
|
||||
// the Free Software Foundation, either version 3 of the License, or //
|
||||
// any later version. //
|
||||
// //
|
||||
// OS/K is distributed in the hope that it will be useful, //
|
||||
// but WITHOUT ANY WARRANTY//without even the implied warranty of //
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
|
||||
// GNU General Public License for more details. //
|
||||
// //
|
||||
// You should have received a copy of the GNU General Public License //
|
||||
// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
|
||||
//----------------------------------------------------------------------------//
|
||||
|
||||
#include <kernel/base.h>
|
||||
#include <kernel/iomisc.h>
|
||||
|
||||
void CpuEnableRtc(void)
|
||||
{
|
||||
ulong flags = KePauseIRQs();
|
||||
// Setting up the register control
|
||||
IoWriteByteOnPort(0x70, 0x8A); //selects status reg A and DISABLE NMI
|
||||
IoWriteByteOnPort(0x71, 0x20);
|
||||
//Enabling the IRQ 8
|
||||
IoWriteByteOnPort(0x70, 0x8B);
|
||||
char read = IoReadByteFromPort(0x71); // Because read causes reset
|
||||
IoWriteByteOnPort(0x70, 0x8B);
|
||||
IoWriteByteOnPort(0x71, read | 0x40);
|
||||
KeRestoreIRQs(flags);
|
||||
}
|
||||
|
|
@ -36,6 +36,9 @@ extern void BtInitBootInfo(multiboot_info_t *mbi, void *codeSeg);
|
|||
// io/vga.c
|
||||
extern error_t IoInitVGABuffer(void);
|
||||
|
||||
//io/keyb.
|
||||
extern error_t KeybSetup(void);
|
||||
|
||||
// cpu/idt.c
|
||||
extern void IdtSetup(void);
|
||||
|
||||
|
|
@ -76,15 +79,10 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
|
|||
// Several inits
|
||||
MmInitHeap();
|
||||
PsInitSched();
|
||||
|
||||
//MmPrintMemoryMap();
|
||||
KeybSetup();
|
||||
IdtSetup();
|
||||
KeEnableIRQs();
|
||||
|
||||
// Test Page Fault
|
||||
long addr = -1;
|
||||
DebugLog("%s", addr);
|
||||
|
||||
KernLog("\nGoodbye!");
|
||||
|
||||
// End this machine's suffering
|
||||
|
|
|
|||
|
|
@ -22,11 +22,10 @@
|
|||
// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
|
||||
//----------------------------------------------------------------------------//
|
||||
|
||||
#include <kernel/cpu.h>
|
||||
#include <kernel/iomisc.h>
|
||||
|
||||
extern void KeybIsr(void);
|
||||
extern void IdtRegisterIrq(void (*isr)(void), uchar irq, uchar flags);
|
||||
extern IdtRegisterIrq(void (*isr)(void), uchar irq, uchar flags);
|
||||
|
||||
void KeybSetup(void)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue