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PCI cleanup

This commit is contained in:
Antoine Cure 2020-02-12 17:48:05 +01:00
parent 23362604f9
commit 362e90d380
No known key found for this signature in database
GPG Key ID: DCA412F83BD81F24
2 changed files with 17 additions and 9 deletions
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2
include/io/pci.h
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@ -48,7 +48,7 @@
//----------------------------------------------------------------------------// //----------------------------------------------------------------------------//
void IoInitPCI(); void IoInitPCI();
void pciScanAll(); void IoPciEnumerate();
#endif #endif

24
kaleid/kernel/io/pci.c
View File

@ -30,7 +30,8 @@
void* pciConfigBaseAddress = NULL; void* pciConfigBaseAddress = NULL;
static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, ushort offset) static inline void* pciGetConfigAddr(uchar bus, uchar device,
uchar function, ushort offset)
{ {
if(device > 32) { if(device > 32) {
KernLog("pciGetConfigAddr(): bad device ID\n"); KernLog("pciGetConfigAddr(): bad device ID\n");
@ -45,25 +46,29 @@ static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, us
return 0; return 0;
} }
return (void*)(bus*32*8*4096 + device*8*4096 + function*4096 + offset + (ulong)pciConfigBaseAddress); return (void*)(bus*32*8*4096 + device*8*4096 + function*4096 +
offset + (ulong)pciConfigBaseAddress);
} }
uchar pciReadConfigByte(uchar bus, uchar device, uchar function, ushort offset) static inline uchar pciReadConfigByte(uchar bus, uchar device,
uchar function, ushort offset)
{ {
return *((uchar*)(pciGetConfigAddr(bus, device, function, offset))); return *((uchar*)(pciGetConfigAddr(bus, device, function, offset)));
} }
ushort pciReadConfigWord(uchar bus, uchar device, uchar function, ushort offset) static inline ushort pciReadConfigWord(uchar bus, uchar device,
uchar function, ushort offset)
{ {
return *((ushort*)(pciGetConfigAddr(bus, device, function, offset))); return *((ushort*)(pciGetConfigAddr(bus, device, function, offset)));
} }
uint pciReadConfigDWord(uchar bus, uchar device, uchar function, ushort offset) static inline uint pciReadConfigDWord(uchar bus, uchar device,
uchar function, ushort offset)
{ {
return *((uint*)(pciGetConfigAddr(bus, device, function, offset))); return *((uint*)(pciGetConfigAddr(bus, device, function, offset)));
} }
void pciScanAll() void IoPciEnumerate()
{ {
if(pciConfigBaseAddress == NULL) { if(pciConfigBaseAddress == NULL) {
KernLog("Unable to access PCI configuration : MCFG table not reachable\n"); KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
@ -75,7 +80,10 @@ void pciScanAll()
for(uchar function = 0; function < 8; function++) { for(uchar function = 0; function < 8; function++) {
ushort vendor = pciReadConfigWord(bus, device, function, PCI_REG_VENDOR); ushort vendor = pciReadConfigWord(bus, device, function, PCI_REG_VENDOR);
if(vendor == 0xffff) continue; if(vendor == 0xffff) continue;
DebugLog("PCI device found ! vendor: %x, device: %x\n", vendor, pciReadConfigWord(bus, device, function, PCI_REG_DEVICE)); DebugLog("PCI device found ! vendor: %x, device: %x\n",
vendor,
pciReadConfigWord(bus, device, function, PCI_REG_DEVICE)
);
} }
} }
} }
@ -91,7 +99,7 @@ void IoInitPCI()
pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress; pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress); DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
pciScanAll(); IoPciEnumerate();
} }