Merge branch 'acpi' of gitlab.os-k.eu:os-k-team/os-k into acpi
This commit is contained in:
Adrien Bourmault
commit
97f1c5f25d
10
AUTHORS
10
AUTHORS
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@ -28,17 +28,17 @@ project repository, and own the copyright in it.
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Founders and owner of the OS/K project repository
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Julian Barathieu (julianb0)
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Adrien Bourmault (neox95)
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Julian Barathieu (spectral)
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Adrien Bourmault (neox)
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Main contributors
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Julian Barathieu (julianb0)
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Adrien Bourmault (neox95)
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Julian Barathieu (spectral)
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Adrien Bourmault (neox)
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Other contributors
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(void)
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Antoine Cure (Tinei)
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Contact : os-k-team@os-k.eu
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@ -129,3 +129,8 @@ IDT Overhaul
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* Keyboard : Total rewriting of the keyboard layout system, and new functionnalities
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* Shell : Command history, new keyboard system implemented
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* Acpi : just a beginning
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2020-02-06 @os-k-team <os-k-team@os-k.eu>
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* Acpi : Root table detected and FADT ready to be parsed
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* Shell : now prints a legal message
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* dmesg : the new command to print line of the new debug buffer !
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@ -32,6 +32,7 @@
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IdtEntry_t idt[256] = { 0 };
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IdtPtr_t _KeIdtPtr;
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bool KeIdtIsInitialized = 0;
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ulong KeSpuriousCount = 0;
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static ISRList_t isrList = { 0 };
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@ -73,7 +74,6 @@ static char *ExceptionsChar[32] = {
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static void EnablePIC(void);
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static void EarlyExceptionHandler(ISRFrame_t *regs);
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static void DoubleFaultHandler(ISRFrame_t *regs);
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static void SpuriousChkHandler(ISRFrame_t *regs);
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//
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// Registers an isr with his IRQ to handle driver interrupts
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@ -158,7 +158,7 @@ void KeSetupIDT(void)
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// Set IDT IRQs Gates
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KeSetIDTGate(0x20, (ulong)isr32, codeSeg, 0x8E, 0);
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KeSetIDTGate(0x21, (ulong)isr33, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E, 3); // NEVER RAISED : cascaded
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KeSetIDTGate(0x23, (ulong)isr35, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x24, (ulong)isr36, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x25, (ulong)isr37, codeSeg, 0x8E, 3);
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@ -182,7 +182,6 @@ void KeSetupIDT(void)
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KeRegisterISR(KeBrkDumpRegisters, 0x3);
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KeRegisterISR(DoubleFaultHandler, 0x8);
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KeRegisterISR(SpuriousChkHandler, 0x27);
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// Load IDT
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KeLoadIDT();
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@ -219,12 +218,12 @@ static void EnablePIC(void)
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IoWriteByteOnPort(0xa0, 0x11);
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// Set ICW2 (IRQ base offsets)
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IoWriteByteOnPort(0x21, 0x20); //0x20 is the first free interrupt for IRQ0
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IoWriteByteOnPort(0xa1, 0x28); // PIC2 is offseted to 0x28
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IoWriteByteOnPort(0x21, 0x20); // 0x20 is the first free interrupt for IRQ0
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IoWriteByteOnPort(0xa1, 0x28); // PIC2 is offseted to 0x28
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// Set ICW3
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IoWriteByteOnPort(0x21, 0x4);
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IoWriteByteOnPort(0xa1, 0x2);
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IoWriteByteOnPort(0x21, 0x4); // A slave exists
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IoWriteByteOnPort(0xa1, 0x2); // You're a slave
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// Set ICW4
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IoWriteByteOnPort(0x21, 0x1);
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@ -254,7 +253,7 @@ void KeMaskIRQ(uchar isr)
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uchar port;
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uchar value;
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if(isr < 0x8) {
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if(isr < 8) {
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port = 0x21;
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} else {
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port = 0xA1;
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@ -295,20 +294,37 @@ void KeDisableNMI(void)
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DebugLog("NMI Interrupts disabled\n");
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}
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//
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// Get the content of a register of the PIC. Parameter is a ocw3 command :
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// - 0x0a : read the IRR
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// - 0x0b : read the ISR
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//
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static inline ushort KeGetIrqRegister(int ocw3)
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{
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IoWriteByteOnPort(0x20, ocw3);
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IoWriteByteOnPort(0xA0, ocw3);
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return ((IoReadByteFromPort(0xA0) << 8) | IoReadByteFromPort(0x20)); // We MUST read the COMMAND PORT
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}
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//
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// The main ISR handler
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//
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void _KeHandleISR(ISRFrame_t *regs)
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{
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/* if ((!regs) || (!regs->rip)) */
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/* KeStartPanic("[ISR ?] Unknown ISR Exception Abort\n"); */
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if ((regs->intNo >= 0x15) && (regs->intNo <= 0x1D))
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return; // INTEL RESERVED
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if ((regs->intNo == 0x0F) || (regs->intNo == 0x1F))
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return; // INTEL RESERVED
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// Spurious interrupt handling.
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if (!(KeGetIrqRegister(0x0b) & (1<<(regs->intNo - 0x20)))) {
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KeSpuriousCount++;
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return;
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}
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for (int i = 0; i < isrList.n; i++) {
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if (regs->intNo == isrList.entry[i].isrNo) {
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isrList.entry[i].isr(regs);
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@ -345,14 +361,6 @@ static void EarlyExceptionHandler(ISRFrame_t *regs)
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KeHaltCPU();
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}
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//
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// Spurious interruption check
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//
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void SpuriousChkHandler(ISRFrame_t *regs)
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{
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// XXX;
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}
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//
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// Double Fault handling and stack overflow detection
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//
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