From 9930a4516372b7a2fc1f40fcc6db6068043b4b5b Mon Sep 17 00:00:00 2001
From: Antoine Cure <tinei@protonmail.com>
Date: Wed, 12 Feb 2020 13:15:10 +0100
Subject: [PATCH] Fixed PCI config base address error

---
 Makefile               |  2 +-
 include/io/acpi.h      |  4 ++--
 kaleid/kernel/io/pci.c | 36 +++++++++---------------------------
 3 files changed, 12 insertions(+), 30 deletions(-)

diff --git a/Makefile b/Makefile
index 10c9128..ebe01ea 100644
--- a/Makefile
+++ b/Makefile
@@ -272,7 +272,7 @@ all :
 
 test: all installonimage
 	@qemu-system-x86_64 -vga std -enable-kvm -machine type=q35 -soundhw pcspk -cpu host -s \
-	 -rtc base=localtime -m $(ram) -hda $(installdisk) \
+	 -rtc base=localtime -m $(ram) -hda $(installdisk) -net nic,model=rtl8139  \
 	 -d cpu_reset,guest_errors,pcall,int 2> $(BUILDDIR)/qemu.log &
 
 run: test
diff --git a/include/io/acpi.h b/include/io/acpi.h
index 56a2dde..3363a8a 100644
--- a/include/io/acpi.h
+++ b/include/io/acpi.h
@@ -196,7 +196,7 @@ struct FADT_t
 
 //----------------------------------------------------------------------------//
 
-struct SDT_MCFG_t {
+struct MCFG_t {
   char signature[4];
   uint length;
   uchar revision;
@@ -209,7 +209,7 @@ struct SDT_MCFG_t {
   ulong reserved;
   
   void* pciConfigBaseAddress;
-};
+} __attribute__ ((packed));
 
 //----------------------------------------------------------------------------//
 
diff --git a/kaleid/kernel/io/pci.c b/kaleid/kernel/io/pci.c
index cd591d1..9222561 100644
--- a/kaleid/kernel/io/pci.c
+++ b/kaleid/kernel/io/pci.c
@@ -44,25 +44,13 @@ static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, us
         KernLog("pciGetConfigAddr(): bad register offset\n");
         return 0;
     }
-    ulong addr = bus*32*8*4096 + device*8*4096 + function*4096 + offset + (ulong)pciConfigBaseAddress;
-        // DEBUG
-        KernLog("bus: %u\n", bus);
-        KernLog("device: %u\n", device);
-        KernLog("function: %u\n", function);
-        KernLog("offset: %u\n", offset);
-        KernLog("ADDR: %lx\n", addr);
-        KernLog("ADDR: %p\n", (void*)addr);
-    return (void*)addr;
+    
+    return (void*)(bus*32*8*4096 + device*8*4096 + function*4096 + offset + (ulong)pciConfigBaseAddress);
 }
 
 uchar pciReadConfigByte(uchar bus, uchar device, uchar function, ushort offset)
 {
-    uchar *ptr = (uchar*)(pciGetConfigAddr(bus, device, function, offset));
-    KernLog("ADDR_uchar*: %p\n", ptr);
-    uchar value = *ptr;
-    //KernLog("VALUE: %u\n\n", value);
-    
-    return *ptr;
+    return *((uchar*)(pciGetConfigAddr(bus, device, function, offset)));
 }
 
 ushort pciReadConfigWord(uchar bus, uchar device, uchar function, ushort offset)
@@ -81,34 +69,28 @@ void pciScanAll()
         KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
         return;
     }
-    //KernLog("%x", pciReadConfigByte(0, 0, 0, 0));
-    uchar byte = pciReadConfigByte(0, 0, 0, 0);
-    
-    /*
-    for(uchar bus = 0; bus < 256; bus++) {
+
+    for(uchar bus = 0; bus < 255; bus++) {
         for(uchar device = 0; device < 32; device++) {
             for(uchar function = 0; function < 8; function++) {
-                ushort vendor = pciReadWord(bus, device, function, PCI_REG_VENDOR);
+                ushort vendor = pciReadConfigWord(bus, device, function, PCI_REG_VENDOR);
                 if(vendor == 0xffff) continue;
-                KernLog("PCI device found ! vendor: %x, device: %x\n", vendor, pciReadWord(bus, device, function, PCI_REG_DEVICE));
+                DebugLog("PCI device found ! vendor: %x, device: %x\n", vendor, pciReadConfigWord(bus, device, function, PCI_REG_DEVICE));
             }
         }
     }
-    */
+    
 }
 
 void IoInitPCI()
 {
-    struct SDT_MCFG_t *MCFG_table = (struct SDT_MCFG_t*)IoGetAcpiTable(SDT_MCFG);
+    struct MCFG_t *MCFG_table = (struct MCFG_t*)IoGetAcpiTable(SDT_MCFG);
     if(MCFG_table == NULL) {
         KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
     }
     pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
     DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
     
-    // 0x ff00 0000 0000 0000
-    MmMapPage(pciConfigBaseAddress, pciConfigBaseAddress + 256*1024*1024, PRESENT | READWRITE);
-    
     pciScanAll();
 }