Some cosmetics, add panic when necessary
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@ -86,17 +86,9 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
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// ACPI
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IoInitAcpi();
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// PCI
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// PCI express
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IoInitPCI();
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// Test RTL8139
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PciDev_t *rtl8139_pciDev = IoPciGetDevice(0x10EC, 0x8139);
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if(rtl8139_pciDev != NULL)
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{
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DebugLog("Network card RTL8139 found ! PCI config addr = %p\n",
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rtl8139_pciDev->configAddr);
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}
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// Scheduler
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PsInitSched();
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@ -169,16 +169,14 @@ static inline void IoInitRXSDT(void)
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KeStartPanic("Invalid RSDT checksum : %d vs 0", checksum);
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if (IoACPIVersion == 1) {
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DebugLog("ACPI Root System Table %s (%s) length %d [%p]\n",
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DebugLog("ACPI Root System Table %s length %d [%p]\n",
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rxsdt->signature,
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rxsdt->OEMID,
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rxsdt->length,
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rxsdt
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);
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} else {
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DebugLog("ACPI Extended System Table %s (%s) length %d [%p]\n",
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DebugLog("ACPI Extended System Table %s length %d [%p]\n",
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rxsdt->signature,
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rxsdt->OEMID,
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rxsdt->length,
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rxsdt
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);
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@ -222,9 +220,8 @@ static inline void IoSearchAcpiTables(void)
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if (!checksum) {
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for (ulong i=0; i < N_SDT_TYPES; i++) {
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if (!strncmp(table->signature, SDTChar[i], 4)) {
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DebugLog("ACPI System Table %s (OEM %s) length %d [%p]\n",
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DebugLog("ACPI System Table %s length %d [%p]\n",
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SDTChar[i],
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table->OEMID,
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table->length,
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table
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);
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@ -248,9 +245,8 @@ static inline void IoSearchAcpiTables(void)
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checksum = DoChecksum(dsdt, (size_t)dsdt->length, 0, 0);
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if (!checksum) {
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if (!strncmp(dsdt->signature, SDTChar[SDT_DSDT], 4)) {
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DebugLog("ACPI System Table %s (OEM %s) length %d [%p]\n",
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DebugLog("ACPI System Table %s length %d [%p]\n",
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SDTChar[SDT_DSDT],
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dsdt->OEMID,
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dsdt->length,
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dsdt
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);
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@ -34,15 +34,15 @@ static inline void* pciGetConfigAddr(uchar bus, uchar device,
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uchar function, ushort offset)
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{
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if(device > 32) {
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KernLog("pciGetConfigAddr(): bad device ID\n");
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DebugLog("pciGetConfigAddr(): bad device ID\n");
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return 0;
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}
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if(function > 8) {
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KernLog("pciGetConfigAddr(): bad function ID\n");
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DebugLog("pciGetConfigAddr(): bad function ID\n");
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return 0;
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}
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if(offset > 4096) {
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KernLog("pciGetConfigAddr(): bad register offset\n");
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DebugLog("pciGetConfigAddr(): bad register offset\n");
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return 0;
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}
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@ -109,7 +109,7 @@ void IoPciWriteConfigDWord(PciDev_t *device, ushort offset, uint data)
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void IoPciEnumerate()
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{
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if(pciConfigBaseAddress == NULL) {
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KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
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KeStartPanic("Unable to access PCI configuration : MCFG table not reachable\n");
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return;
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}
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@ -130,7 +130,7 @@ void IoPciEnumerate()
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PciDev_t *IoPciGetDevice(ushort vendorID, ushort deviceID)
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{
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if(pciConfigBaseAddress == NULL) {
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KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
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KeStartPanic("Unable to access PCI configuration : MCFG table not reachable\n");
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return NULL;
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}
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@ -155,7 +155,7 @@ void IoInitPCI()
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{
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struct MCFG_t *MCFG_table = (struct MCFG_t*)IoGetAcpiTable(SDT_MCFG);
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if(MCFG_table == NULL) {
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KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
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KeStartPanic("Unable to access PCI configuration : MCFG table not reachable\n");
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}
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pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
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DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
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@ -165,9 +165,9 @@ void IoInitPCI()
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// Give R/W access to the configuration space
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for(int i=0; i < 65536; i++) // 65536 = 256 * 32 * 8
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{
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// 4096 for page size TODO: use of KPAGESIZE
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MmMapPage((void *)((ulong)pciConfigBaseAddress + i * 4096),
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(void *)((ulong)pciConfigBaseAddress + i * 4096), PRESENT | READWRITE);
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MmMapPage((void *)((ulong)pciConfigBaseAddress + i * KPAGESIZE),
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(void *)((ulong)pciConfigBaseAddress + i * KPAGESIZE),
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PRESENT | READWRITE);
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}
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}
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