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Paging now controlled by the kernel

This commit is contained in:
Adrien Bourmault 2019-05-15 02:26:55 +02:00
parent ed7634ba1d
commit b3240ec324
5 changed files with 40 additions and 36 deletions
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15
Makefile
View File

@ -206,17 +206,20 @@ test: all
-d cpu_reset,guest_errors,pcall,int 2> $(BUILDDIR)/qemu.log &
test32: all
@qemu-system-i386 -hda $(BUILDDIR)/bin/disk.img -d cpu_reset,guest_errors,pcall,int 2> $(BUILDDIR)/qemu.log &
@qemu-system-i386 -hda $(BUILDDIR)/bin/disk.img -d \
cpu_reset,guest_errors,pcall,int 2> $(BUILDDIR)/qemu.log &
debug: all
@qemu-system-x86_64 -soundhw pcspk -rtc base=localtime -m 64M -hda $(BUILDDIR)/bin/disk.img -no-reboot \
-no-shutdown -d cpu_reset,guest_errors,pcall,int 2> $(BUILDDIR)/qemu.log &
@setsid qemu-system-x86_64 -soundhw pcspk -rtc base=localtime -m 64M \
-hda $(BUILDDIR)/bin/disk.img -no-reboot -no-shutdown -d \
cpu_reset,guest_errors,pcall,int 2> $(BUILDDIR)/qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > $(BUILDDIR)/kaleid64_disasm.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > $(BUILDDIR)/kaleid32_disasm.asm
gdb: all
@qemu-system-x86_64 -m 64M -soundhw pcspk -rtc base=localtime -hda $(BUILDDIR)/bin/disk.img -no-reboot \
-no-shutdown -d cpu_reset,guest_errors,pcall,int -s -S 2> $(BUILDDIR)/qemu.log &
@setsid qemu-system-x86_64 -m 64M -soundhw pcspk -rtc base=localtime \
-hda $(BUILDDIR)/bin/disk.img -no-reboot -no-shutdown -d \
cpu_reset,guest_errors,pcall,int -s -S 2> $(BUILDDIR)/qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > kaleid64_disasm.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > kaleid32_disasm.asm
@gdb \
@ -226,7 +229,7 @@ gdb: all
-ex "break BtStartKern" \
ddd: all
@qemu-system-x86_64 -m 64M -hda $(BUILDDIR)/bin/disk.img -no-reboot -soundhw pcspk \
@setsid qemu-system-x86_64 -m 64M -hda $(BUILDDIR)/bin/disk.img -no-reboot -soundhw pcspk \
-no-shutdown -d cpu_reset,guest_errors,pcall,int -s 2> $(BUILDDIR)/qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > kaleid64_disasm.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > kaleid32_disasm.asm

5
boot/loader/mem/management.inc
View File

@ -48,11 +48,11 @@ Setup_paging:
cmp ecx, MAX_MEMORY ; PDP table is mapped if MAX_MEMORY
jne .map_pdp_table ; else map the next entry
;; Map each PD entry to a 'huge' 2MiB page
;; Map each PD entry to a 'huge' 4MiB page
mov ecx, 0x0 ; counter variable
.map_pd_table:
;; map ecx-th PD entry to a huge page that starts at address 2MiB*ecx
;; map ecx-th PD entry to a huge page that starts at address 4MiB*ecx
mov eax, 0x200000
mul ecx ; start address of ecx-th page
or eax, 1 << 7 | 1 << 1 | 1 << 0 ; present + writable + huge
@ -60,6 +60,7 @@ Setup_paging:
inc ecx
cmp ecx, 512 * MAX_MEMORY ; PD table is mapped if 512
jne .map_pd_table ; else map the next entry
ret
; ---------------------------------------------------------------------------- ;
; Enable long mode and paging ;

3
kaleid/kernel/init/init.c
View File

@ -48,13 +48,14 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
// Memory
MmInitMemoryMap();
MmInitPaging();
// Interrupts launching
KeSetupIDT();
KeEnableIRQs();
// Several inits
MmInitPaging();
MmInitHeap();
// Start drivers

5
kaleid/kernel/mm/paging.asm
View File

@ -20,5 +20,8 @@ MmDisableWriteProtect:
ret
MmLoadPML4:
mov cr3, rsi
push rax
mov rax, rdi
mov cr3, rax
pop rax
ret

44
kaleid/kernel/mm/paging.c
View File

@ -1,16 +1,16 @@
#include <kernel.h>
#define PAGESIZE (4 * KB)
#define PAGEALIGNED __attribute__((__aligned__(4096)))
// Page directory pointer offset
typedef uint pdpe_t;
typedef ulong pdpe_t;
// Page directory offset
typedef uint pde_t;
typedef ulong pde_t;
// Page table entry
typedef uint pte_t;
typedef ulong pte_t;
// paging.asm
void MmLoadPML4(void *);
@ -28,38 +28,34 @@ enum
MF_DIRTY = 1 << 6
};
#define RAM 8
//-----------
pdpe_t pml4[1024] ;
volatile pdpe_t PML4[512] __attribute__((__aligned__(4096)));
// First PDPE of our pml4
pde_t first_pdpe[1024] PAGEALIGNED;
volatile pde_t PDP[512] __attribute__((__aligned__(4096)));
// First PDP of first_pdpe
pte_t first_pde[1024] PAGEALIGNED;
volatile pte_t PD[512 * RAM] __attribute__((__aligned__(4096)));
// First PTE of first_pde
uint first_pte[1024] PAGEALIGNED;
void MmInitPaging(void)
{
size_t i;
memzero((void *)&PML4[0], sizeof(PML4));
memzero((void *)&PDP[0], sizeof(PDP));
memzero((void *)&PD[0], sizeof(PD));
// Set all PDPEs to kernel-mode not present
for (i = 0; i < 1024; i++) pml4[i] = MF_READWRITE;
for (i = 0; i < 1024; i++) first_pdpe[i] = MF_READWRITE;
for (i = 0; i < 1024; i++) first_pde[i] = MF_READWRITE;
// Set all pages in first_pte to kernel-mode present
for (i = 0; i < 1024; i++) {
first_pte[i] = (i * PAGESIZE) | (MF_READWRITE | MF_PRESENT);
for (int i = 0; i < 512 * RAM; i++) {
PD[i] = ((ulong)i * 2048 * 1024) | MF_PRESENT | MF_READWRITE | 1 << 7;
}
// Install the first PTE
first_pde[0] = (uint)(ulong)first_pte | (MF_READWRITE | MF_PRESENT);
first_pdpe[0] = (uint)(ulong)first_pde | (MF_READWRITE | MF_PRESENT);
pml4[0] = (uint)(ulong)first_pdpe | (MF_READWRITE | MF_PRESENT);
MmLoadPML4(pml4);
for (int i = 0; i < RAM; i++) {
PDP[i] = (ulong)(&PD[i*512])| MF_PRESENT | MF_READWRITE;
}
PML4[0] = (ulong)(&PDP[0])| MF_PRESENT | MF_READWRITE;
MmLoadPML4((void *)PML4);
}