diff --git a/ChangeLog b/ChangeLog index 13f49e6..33145db 100644 --- a/ChangeLog +++ b/ChangeLog @@ -93,3 +93,9 @@ IDT Overhaul 2019-05-14 @os-k-team * Whole Project Tree : big reorganization * Makefile : dependencies automated + +2019-05-21 @os-k-team + * VGA and Shell and bprintf: Color support + * GDT : CS and TSS works + * IDT : Double Fault and Stack Segment Fault have a separate stack + * Stack : guard pages are now fully functionnal diff --git a/include/ke/idt.h b/include/ke/idt.h index 4b4f2be..80ae7ca 100644 --- a/include/ke/idt.h +++ b/include/ke/idt.h @@ -41,7 +41,7 @@ struct IdtEntry_t { ushort baseLow; ushort selector; - uchar reservedIst; + uchar ist; uchar flags; ushort baseMid; uint baseHigh; @@ -71,7 +71,11 @@ void KeLoadIDT(void); void KeSetupIDT(void); void KeSendEOItoPIC(uchar isr); -void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags); +void KeSetIDTGate(uchar rank, + ulong base, + ushort selector, + uchar flags, + uchar ist); error_t KeRegisterISR(void (*isr)(ISRFrame_t *regs), uchar isrNo); void KeBrkDumpRegisters(ISRFrame_t *regs); diff --git a/include/mm/mm.h b/include/mm/mm.h index 3e1400d..897e7a5 100644 --- a/include/mm/mm.h +++ b/include/mm/mm.h @@ -40,6 +40,8 @@ #define NVS_ZONE 4 // Dunno #define BADRAM_ZONE 5 // Invalid zone because material problem... #define MAX_ENTRIES 2048 // Max number of memory map entries +#define KPAGESIZE (4 * KB) +#define UPAGESIZE (2 * MB) //----------------------------------------------------------------------------// @@ -71,15 +73,14 @@ struct GdtEntry_t struct TssDescriptor_t { - ushort lowLimit; - ushort lowBase; - uchar middleBase; - uchar access; - unsigned middleLimit: 4; - unsigned flags: 4; - uchar highBase; - uint veryHighBase; - uint reserved; + ushort lowLimit; + ushort lowBase; + uchar middleBase; + uchar access; + uchar flags; + uchar highBase; + uint veryHighBase; + uint reserved; } __attribute__ ((packed)); struct Tss_t @@ -149,7 +150,7 @@ void MmInitGdt(void); // // Loads the descriptor table // -extern void MmLoadGdt(); +extern void MmLoadGdt(GdtPtr_t *gdtPtr, ushort tssOffset); // diff --git a/kaleid/kernel/init/init.c b/kaleid/kernel/init/init.c index 65dc333..27f6ca4 100644 --- a/kaleid/kernel/init/init.c +++ b/kaleid/kernel/init/init.c @@ -54,7 +54,6 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg) BtDoSanityChecks(mbMagic); // Memory - //MmInitGdt(); MmInitMemoryMap(); MmInitPaging(); MmInitHeap(); @@ -62,6 +61,7 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg) // Interrupts launching KeSetupIDT(); KeEnableIRQs(); + MmInitGdt(); // Start drivers KeEnableRTC(); diff --git a/kaleid/kernel/ke/idt.c b/kaleid/kernel/ke/idt.c index 204aebd..873c2ad 100644 --- a/kaleid/kernel/ke/idt.c +++ b/kaleid/kernel/ke/idt.c @@ -31,6 +31,8 @@ IdtEntry_t idt[256] = { 0 }; IdtPtr_t _KeIdtPtr; bool KeIdtIsInitialized = 0; +extern ulong *MmStackGuards[2]; + static ISRList_t isrList = { 0 }; static char *ExceptionsChar[32] = { @@ -70,6 +72,10 @@ static char *ExceptionsChar[32] = { static void EnablePIC(void); static void EarlyExceptionHandler(ISRFrame_t *regs); +static void DoubleFaultHandler(ISRFrame_t *regs); + +//paging.c +ulong *MmGetStackGuards(void); // // Registers an isr with his IRQ to handle driver interrupts @@ -117,56 +123,56 @@ void KeSetupIDT(void) _KeIdtPtr.base = &idt; // Set IDT Exception Gates - KeSetIDTGate(0x00, (ulong)isr0, codeSeg, 0x8E); - KeSetIDTGate(0x01, (ulong)isr1, codeSeg, 0x8E); - KeSetIDTGate(0x02, (ulong)isr2, codeSeg, 0x8E); - KeSetIDTGate(0x03, (ulong)isr3, codeSeg, 0x8E); - KeSetIDTGate(0x04, (ulong)isr4, codeSeg, 0x8E); - KeSetIDTGate(0x05, (ulong)isr5, codeSeg, 0x8E); - KeSetIDTGate(0x06, (ulong)isr6, codeSeg, 0x8E); - KeSetIDTGate(0x07, (ulong)isr7, codeSeg, 0x8E); - KeSetIDTGate(0x08, (ulong)isr8, codeSeg, 0x8E); - KeSetIDTGate(0x09, (ulong)isr9, codeSeg, 0x8E); - KeSetIDTGate(0x0A, (ulong)isr10, codeSeg, 0x8E); - KeSetIDTGate(0x0B, (ulong)isr11, codeSeg, 0x8E); - KeSetIDTGate(0x0C, (ulong)isr12, codeSeg, 0x8E); - KeSetIDTGate(0x0D, (ulong)isr13, codeSeg, 0x8E); - KeSetIDTGate(0x0E, (ulong)isr14, codeSeg, 0x8E); - KeSetIDTGate(0x0F, (ulong)isr15, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x10, (ulong)isr16, codeSeg, 0x8E); - KeSetIDTGate(0x11, (ulong)isr17, codeSeg, 0x8E); - KeSetIDTGate(0x12, (ulong)isr18, codeSeg, 0x8E); - KeSetIDTGate(0x13, (ulong)isr19, codeSeg, 0x8E); - KeSetIDTGate(0x14, (ulong)isr20, codeSeg, 0x8E); - KeSetIDTGate(0x15, (ulong)isr21, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x16, (ulong)isr22, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x17, (ulong)isr23, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x18, (ulong)isr24, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x19, (ulong)isr25, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x1A, (ulong)isr26, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x1B, (ulong)isr27, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x1C, (ulong)isr28, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x1D, (ulong)isr29, codeSeg, 0x8E); // INTEL RESERVED - KeSetIDTGate(0x1E, (ulong)isr30, codeSeg, 0x8E); - KeSetIDTGate(0x1F, (ulong)isr31, codeSeg, 0x8E); // INTEL RESERVED + KeSetIDTGate(0x00, (ulong)isr0, codeSeg, 0x8E, 0); + KeSetIDTGate(0x01, (ulong)isr1, codeSeg, 0x8E, 0); + KeSetIDTGate(0x02, (ulong)isr2, codeSeg, 0x8E, 0); + KeSetIDTGate(0x03, (ulong)isr3, codeSeg, 0x8E, 0); + KeSetIDTGate(0x04, (ulong)isr4, codeSeg, 0x8E, 0); + KeSetIDTGate(0x05, (ulong)isr5, codeSeg, 0x8E, 0); + KeSetIDTGate(0x06, (ulong)isr6, codeSeg, 0x8E, 0); + KeSetIDTGate(0x07, (ulong)isr7, codeSeg, 0x8E, 0); + KeSetIDTGate(0x08, (ulong)isr8, codeSeg, 0x8E, 1); + KeSetIDTGate(0x09, (ulong)isr9, codeSeg, 0x8E, 0); + KeSetIDTGate(0x0A, (ulong)isr10, codeSeg, 0x8E, 0); + KeSetIDTGate(0x0B, (ulong)isr11, codeSeg, 0x8E, 0); + KeSetIDTGate(0x0C, (ulong)isr12, codeSeg, 0x8E, 1); + KeSetIDTGate(0x0D, (ulong)isr13, codeSeg, 0x8E, 0); + KeSetIDTGate(0x0E, (ulong)isr14, codeSeg, 0x8E, 0); + KeSetIDTGate(0x0F, (ulong)isr15, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x10, (ulong)isr16, codeSeg, 0x8E, 0); + KeSetIDTGate(0x11, (ulong)isr17, codeSeg, 0x8E, 0); + KeSetIDTGate(0x12, (ulong)isr18, codeSeg, 0x8E, 0); + KeSetIDTGate(0x13, (ulong)isr19, codeSeg, 0x8E, 0); + KeSetIDTGate(0x14, (ulong)isr20, codeSeg, 0x8E, 0); + KeSetIDTGate(0x15, (ulong)isr21, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x16, (ulong)isr22, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x17, (ulong)isr23, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x18, (ulong)isr24, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x19, (ulong)isr25, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x1A, (ulong)isr26, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x1B, (ulong)isr27, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x1C, (ulong)isr28, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x1D, (ulong)isr29, codeSeg, 0x8E, 0); // INTEL RESERVED + KeSetIDTGate(0x1E, (ulong)isr30, codeSeg, 0x8E, 0); + KeSetIDTGate(0x1F, (ulong)isr31, codeSeg, 0x8E, 0); // INTEL RESERVED // Set IDT IRQs Gates - KeSetIDTGate(0x20, (ulong)isr32, codeSeg, 0x8E); - KeSetIDTGate(0x21, (ulong)isr33, codeSeg, 0x8E); - KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E); - KeSetIDTGate(0x23, (ulong)isr35, codeSeg, 0x8E); - KeSetIDTGate(0x24, (ulong)isr36, codeSeg, 0x8E); - KeSetIDTGate(0x25, (ulong)isr37, codeSeg, 0x8E); - KeSetIDTGate(0x26, (ulong)isr38, codeSeg, 0x8E); - KeSetIDTGate(0x27, (ulong)isr39, codeSeg, 0x8E); - KeSetIDTGate(0x28, (ulong)isr40, codeSeg, 0x8E); - KeSetIDTGate(0x29, (ulong)isr41, codeSeg, 0x8E); - KeSetIDTGate(0x2A, (ulong)isr42, codeSeg, 0x8E); - KeSetIDTGate(0x2B, (ulong)isr43, codeSeg, 0x8E); - KeSetIDTGate(0x2C, (ulong)isr44, codeSeg, 0x8E); - KeSetIDTGate(0x2D, (ulong)isr45, codeSeg, 0x8E); - KeSetIDTGate(0x2E, (ulong)isr46, codeSeg, 0x8E); - KeSetIDTGate(0x2F, (ulong)isr47, codeSeg, 0x8E); + KeSetIDTGate(0x20, (ulong)isr32, codeSeg, 0x8E, 0); + KeSetIDTGate(0x21, (ulong)isr33, codeSeg, 0x8E, 0); + KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E, 0); + KeSetIDTGate(0x23, (ulong)isr35, codeSeg, 0x8E, 0); + KeSetIDTGate(0x24, (ulong)isr36, codeSeg, 0x8E, 0); + KeSetIDTGate(0x25, (ulong)isr37, codeSeg, 0x8E, 0); + KeSetIDTGate(0x26, (ulong)isr38, codeSeg, 0x8E, 0); + KeSetIDTGate(0x27, (ulong)isr39, codeSeg, 0x8E, 0); + KeSetIDTGate(0x28, (ulong)isr40, codeSeg, 0x8E, 0); + KeSetIDTGate(0x29, (ulong)isr41, codeSeg, 0x8E, 0); + KeSetIDTGate(0x2A, (ulong)isr42, codeSeg, 0x8E, 0); + KeSetIDTGate(0x2B, (ulong)isr43, codeSeg, 0x8E, 0); + KeSetIDTGate(0x2C, (ulong)isr44, codeSeg, 0x8E, 0); + KeSetIDTGate(0x2D, (ulong)isr45, codeSeg, 0x8E, 0); + KeSetIDTGate(0x2E, (ulong)isr46, codeSeg, 0x8E, 0); + KeSetIDTGate(0x2F, (ulong)isr47, codeSeg, 0x8E, 0); KeIdtIsInitialized++; @@ -176,6 +182,7 @@ void KeSetupIDT(void) } KeRegisterISR(KeBrkDumpRegisters, 0x3); + KeRegisterISR(DoubleFaultHandler, 0x8); // Load IDT KeLoadIDT(); @@ -185,7 +192,7 @@ void KeSetupIDT(void) // // Set an interrupt gate // -void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags) +void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags, uchar ist) { // Set Base Address idt[rank].baseLow = base & 0xFFFF; @@ -197,7 +204,7 @@ void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags) idt[rank].flags = flags; // Set Reserved Areas to Zero - idt[rank].reservedIst = 0; + idt[rank].ist = ist; idt[rank].reserved = 0; } @@ -296,6 +303,40 @@ static void EarlyExceptionHandler(ISRFrame_t *regs) KeHaltCPU(); } +static void DoubleFaultHandler(ISRFrame_t *regs) +{ + bprintf(BStdOut, "test : %p\n", (ulong)(MmGetStackGuards())[0] + 4*KB); + + if (regs->rsp <= (ulong)(MmGetStackGuards())[0] + 4*KB) { + bprintf(BStdOut, + "\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Stack Overflow%s\n\n" + " Error code : 0x%x (%b)", + + VGA_COLOR_LIGHT_RED, + regs->intNo, + ExceptionsChar[regs->intNo], + regs->ErrorCode, + regs->ErrorCode + ); + } else { + bprintf(BStdOut, + "\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Double Fault Abort\n\n" + " Error code : 0x%x (%b)", + + VGA_COLOR_LIGHT_RED, + regs->ErrorCode, + regs->ErrorCode + ); + + } + + KeBrkDumpRegisters(regs); + + BStdOut->flusher(BStdOut); + + KeHaltCPU(); +} + void KeBrkDumpRegisters(ISRFrame_t *regs) { bprintf(BStdOut, "\n\n" diff --git a/kaleid/kernel/mm/gdt.asm b/kaleid/kernel/mm/gdt.asm index b7b503b..a7fcbd2 100644 --- a/kaleid/kernel/mm/gdt.asm +++ b/kaleid/kernel/mm/gdt.asm @@ -24,8 +24,6 @@ [BITS 64] -extern gdtPtr - global MmLoadGdt global MmStoreGdt @@ -34,7 +32,9 @@ global MmStoreGdt ;; MmLoadGdt: ;; Loading the gdt via the gdtPtr pointer - lgdt [gdtPtr] + lgdt [rdi] + mov ax, si + ltr ax ;; We must far jump because we changed the GDT lea rax, [.next] @@ -49,5 +49,5 @@ MmLoadGdt: ;; MmStoreGdt: ;; Loading the gdt via the gdtPtr pointer - sgdt [gdtPtr] + sgdt [rdi] ret diff --git a/kaleid/kernel/mm/gdt.c b/kaleid/kernel/mm/gdt.c index 0b26975..eb3c4e3 100644 --- a/kaleid/kernel/mm/gdt.c +++ b/kaleid/kernel/mm/gdt.c @@ -23,89 +23,67 @@ //----------------------------------------------------------------------------// #include +#include -//Tss_t tssEntry = { 0 }; GdtPtr_t gdtPtr; - -/* static void SetGdtEntry(int index, uint base, uint limit, uchar access) */ -/* { */ -/* gdtEntries[index].lowBase = (base & 0xFFFF); */ -/* gdtEntries[index].middleBase = (base >> 16) & 0xFF; */ -/* gdtEntries[index].highBase = (base >> 24) & 0xFF; */ - -/* gdtEntries[index].lowLimit = (limit & 0xFFFF); */ -/* gdtEntries[index].granularity = (limit >> 16) & 0x0F; */ - -/* gdtEntries[index].granularity |= 0xA0; */ - -/* // 0x10 is system */ -/* // 0x80 is present */ -/* gdtEntries[index].access = access | 0x10 | 0x80; */ -/* } */ - -/* static void SetTssEntry(uchar index, ulong base, ulong limit) */ -/* { */ -/* TssDescriptor_t tssDesc = { 0 }; */ - -/* tssDesc.limitLow = limit & 0xffff; */ -/* tssDesc.size = (limit >> 16) & 0xf; */ - -/* tssDesc.base00 = base & 0xffff; */ -/* tssDesc.base16 = (base >> 16) & 0xff; */ -/* tssDesc.base24 = (base >> 24) & 0xff; */ -/* tssDesc.base32 = (base >> 32) & 0xffffffff; */ -/* tssDesc.reserved = 0; */ - -/* tssDesc.access = 0x01 | 0x08 | 0x10 | 0x80; */ - -/* memmove(&gdtEntries[index], &tssDesc, sizeof(TssDescriptor_t)); */ -/* } */ - +GdtEntry_t gdt[4] __attribute__((__aligned__(KPAGESIZE))); +TssDescriptor_t tssDesc __attribute__((__aligned__(KPAGESIZE))); +Tss_t tss __attribute__((__aligned__(KPAGESIZE))); void MmInitGdt(void) { - MmStoreGdt(); + ushort tssOffset = (ushort)((ulong)(&gdt[2]) - (ulong)(&gdt[0])); - GdtEntry_t *gdt = (GdtEntry_t *)(gdtPtr.base); - extern ulong GDT64; + gdtPtr.base = (ulong)&gdt[0]; + gdtPtr.limit = sizeof(gdt) - 1; - DebugLog("GDT ADDR: %p\n", - gdt - ); + memzero((void *)&gdt[0], sizeof(gdt)); + memzero((void *)&tssDesc, sizeof(tssDesc)); + memzero((void *)&tss, sizeof(tss)); - gdt++; + gdt[1].lowLimit = 0xFFFF; + gdt[1].access = 0x98; + gdt[1].flags = 0x20; - DebugLog("GDT : \n" - "lowLimit : %#016hx\n" - "lowBase : %#016hx\n" - "middleBase: %#016hx\n" - "access : %#016hx\n" - "flags : %#016hx\n" - "highBase : %#016hx\n", - gdt->lowLimit, - gdt->lowBase, - gdt->middleBase, - gdt->access, - gdt->flags, - gdt->highBase - ); + tssDesc.access = 0x89; + tssDesc.flags = 0x40; + tssDesc.lowBase = (ulong)&tss & 0xFFFF; + tssDesc.middleBase = ((ulong)&tss >> 16) & 0xFF; + tssDesc.highBase = ((ulong)&tss >> 24) & 0xFF; + tssDesc.veryHighBase = ((ulong)&tss >> 32) & 0xFFFFFFFF; + tssDesc.lowLimit = sizeof(tss); - /* DebugLog("GDT : \n" */ - /* "lowLimit : %#016hx\n" */ - /* "lowBase : %#016hx\n" */ - /* "middleBase: %#016hx\n" */ - /* "access : %#016hx\n" */ - /* "flags : %#016hx\n" */ - /* "highBase : %#016hx\n", */ - /* gdt->lowLimit, */ - /* gdt->lowBase, */ - /* gdt->middleBase, */ - /* gdt->access, */ - /* gdt->flags, */ - /* gdt->highBase */ - /* ); */ + tss.ist1 = 0x0007FFFF; // RESCUE STACK, GARANTIED FREE FOR USE BY OSDEV.ORG + tss.iomap_base = sizeof(tss); - MmLoadGdt(); + memmove(&gdt[2], &tssDesc, sizeof(TssDescriptor_t)); + + /* DebugLog("TSS\n" */ + /* "gdt[0] %#x\n" */ + /* "gdt[2] %#x\n" */ + /* "access : %#x\n" */ + /* "flags : %#x\n" */ + /* "lowBase : %#x\n" */ + /* "middleBase : %#x\n" */ + /* "highBase : %#x\n" */ + /* "veryHighBase: %#x\n" */ + /* "lowLimit : %#x\n" */ + /* "ist : %#x\n" */ + /* "iomap_base : %#x\n" */ + /* "offset : %#x\n", */ + /* &gdt[0], */ + /* &gdt[2], */ + /* tssDesc.access, */ + /* tssDesc.flags, */ + /* tssDesc.lowBase, */ + /* tssDesc.middleBase, */ + /* tssDesc.highBase, */ + /* tssDesc.veryHighBase, */ + /* tssDesc.lowLimit, */ + /* tss.ist1, */ + /* tss.iomap_base, */ + /* tssOffset */ + /* ); */ + + MmLoadGdt(&gdtPtr, tssOffset); } - - diff --git a/kaleid/kernel/mm/paging.c b/kaleid/kernel/mm/paging.c index 9b9d174..d6ec008 100644 --- a/kaleid/kernel/mm/paging.c +++ b/kaleid/kernel/mm/paging.c @@ -7,10 +7,6 @@ #include -#define KPAGESIZE (4 * KB) -#define UPAGESIZE (2 * MB) - - // Page directory pointer offset typedef ulong pdpe_t; @@ -52,7 +48,7 @@ volatile pde_t MmPD[512 * RAM_MAX] __attribute__((__aligned__(KPAGESIZE)));; volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(KPAGESIZE)));; -volatile ulong MmStackGuards[2] = { 0 }; +ulong MmStackGuards[2] = { 0 }; // // Creates our new page table structure and loads it @@ -112,6 +108,7 @@ void MmInitPaging(void) MmLoadPML4((void *)MmPML4); DebugLog("\tPaging tables initialized at %p, %p\n", &MmPD, &MmPT); + DebugLog("\tStack Guards at %p, %p\n", MmStackGuards[0], MmStackGuards[1]); } // @@ -160,6 +157,7 @@ void MmReloadPaging(void) } DebugLog("Paging tables reloaded at %p, %p\n", &MmPD, &MmPT); + DebugLog("Stack Guards at %p, %p\n", MmStackGuards[0], MmStackGuards[1]); } // @@ -188,3 +186,8 @@ void MmActivatePageHandler(void) { KeRegisterISR(PagingHandler, 0xe); } + +ulong *MmGetStackGuards(void) +{ + return &MmStackGuards[0]; +}