quasi functionnal idt

This commit is contained in:
Adrien Bourmault 2019-04-22 22:32:21 +02:00
parent 468c97ba1c
commit ca6c7bbcf9
6 changed files with 59 additions and 32 deletions

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@ -169,7 +169,7 @@ debug: all
gdb: all
@qemu-system-x86_64 -m 64M -hda $(BUILDDIR)/bin/disk.img -no-reboot \
-no-shutdown -d cpu_reset,guest_errors,pcall,int -s 2> $(BUILDDIR)/qemu.log &
-no-shutdown -d cpu_reset,guest_errors,pcall,int -s -S 2> $(BUILDDIR)/qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > kaleid64_disasm.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > kaleid32_disasm.asm
@gdb \

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@ -133,9 +133,10 @@ struct Registers_t
// -------------------------------------------------------------------------- //
void idtSetup(void);
void CpuIdtSetup(void);
void idtSet(uchar rank, ulong base, ushort selector, uchar flags);
void isrHandler(Registers_t reg);
void disablePIC(void);
// -------------------------------------------------------------------------- //

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@ -25,17 +25,15 @@
#include <kernel/base.h>
#include <kernel/cpu.h>
#include <kernel/boot.h>
#include <kernel/iomisc.h>
IdtEntry_t idt[256] = { 0 };
IdtPtr_t idtPtr;
void isrHandlerPrint(Registers_t regs)
void CpuIdtSetup(void)
{
DebugLog("Interrupt %d !!! \n", regs.intNo);
}
disablePIC();
void idtSetup(void)
{
ushort codeSeg = (ushort)(ulong)BtLoaderInfo.codeSegment;
// Set IDT ptr
@ -76,13 +74,9 @@ void idtSetup(void)
//idtSet(30, (ulong)isr30, codeSeg, 0x8E); INTEL RESERVED
// Load IDT
DebugLog("[IdtSetup] Filled \n");
idtInit();
DebugLog("[IdtSetup] Filled at %d with %d bytes\n", sizeof(idtPtr), sizeof(IdtEntry_t));
DebugLog("[IdtSetup] offset %p with %p bytes\n", (ulong)(&idtPtr), (ulong)(idt));
//asm volatile ("sti":::"memory");
DebugLog(" And initialized !\n");
asm volatile ("int %0" : : "N" (0) : "cc", "memory");
DebugLog("[IdtSetup] Initialized !\n");
}
void idtSet(uchar rank, ulong base, ushort selector, uchar flags)
@ -100,3 +94,35 @@ void idtSet(uchar rank, ulong base, ushort selector, uchar flags)
idt[rank].reservedIst = 0;
idt[rank].reserved = 0;
}
void disablePIC(void) {
// Set ICW1
IoWriteByteOnPort(0x20, 0x11);
IoWriteByteOnPort(0xa0, 0x11);
// Set ICW2 (IRQ base offsets)
IoWriteByteOnPort(0x21, 0xe0);
IoWriteByteOnPort(0xa1, 0xe8);
// Set ICW3
IoWriteByteOnPort(0x21, 4);
IoWriteByteOnPort(0xa1, 2);
// Set ICW4
IoWriteByteOnPort(0x21, 1);
IoWriteByteOnPort(0xa1, 1);
// Set OCW1 (interrupt masks)
IoWriteByteOnPort(0x21, 0xff);
IoWriteByteOnPort(0xa1, 0xff);
// ENABLING LOCAL APIC
uint *val = (void*)0xfee000f0;
*val |= (1<<8);
}
void isrHandler(Registers_t regs)
{
DebugLog("Interrupt %d !!! \n", regs.intNo);
return;
}

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@ -26,41 +26,34 @@
global idtInit
extern idtPtr
extern isrHandlerPrint
extern isrHandler
;;
;; Loads the IDT
;;
idtInit:
lidt [idtPtr]
sti
ret
;;
;; ISR handler
;;
isrHandler:
isrPreHandler:
pushAll
xor rax, rax
mov ax, ds
push rax
mov ax, 0x10
call isrHandler
pop rax
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
call isrHandlerPrint
pop rbx
mov ds, bx
mov es, bx
mov fs, bx
mov gs, bx
popAll
add rsp, 8
;sti
sti
iretq
;; Divide Error Fault

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@ -47,7 +47,7 @@
cli
push byte 0
push byte %1
jmp isrHandler
jmp isrPreHandler
%endmacro
%macro IsrWithErrCode 1
@ -55,5 +55,5 @@
isr%1:
cli
push byte %1
jmp isrHandler
jmp isrPreHandler
%endmacro

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@ -40,6 +40,12 @@ extern error_t IoInitVGABuffer(void);
// ps/proc.c test function
extern void pstest(void);
void bug(void)
{
asm volatile ("int %0" : : "N" (0) : "cc", "memory");
}
//
// Entry point of the Kaleid kernel
//
@ -67,9 +73,10 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
MmInitHeap();
PsInitSched();
MmPrintMemoryMap();
//MmPrintMemoryMap();
CpuIdtSetup();
idtSetup();
bug();
// End this machine's suffering
BFlushBuf(BStdOut);