merge BetterCpu

This commit is contained in:
Adrien Bourmault 2019-05-18 21:59:07 +02:00
commit d88cd4d30e
11 changed files with 200 additions and 65 deletions

View File

@ -110,8 +110,28 @@ struct CpuInfo_t
};
struct ISRFrame_t {
/* The register file */
ulong regs[20];
/* The registers */
ulong efer;
ulong cr0;
ulong cr2;
ulong cr3;
ulong cr4;
ulong cr8;
ulong r15;
ulong r14;
ulong r13;
ulong r12;
ulong r11;
ulong r10;
ulong r9;
ulong r8;
ulong rbp;
ulong rdi;
ulong rsi;
ulong rdx;
ulong rcx;
ulong rbx;
ulong rax;
/* The error code and interrupt id */
ulong intNo;

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@ -132,7 +132,7 @@ void MmInitGdt(void);
//
// Loads the descriptor table
//
extern void MmLoadGdt(ulong ds, ulong cs, ulong tr);
extern void MmLoadGdt();
//

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@ -110,7 +110,7 @@ void BtInitBootInfo(multiboot_info_t *mbi, void *codeSeg)
void BtDoSanityChecks(uint mbMagic) {
if (!(mbMagic == MULTIBOOT_BOOTLOADER_MAGIC))
KeStartPanic("\tMagic number %x is incorrect\n", mbMagic);
KeStartPanic("Magic number %x is incorrect\n", mbMagic);
DebugLog("\tKernel successfully loaded at %p\n",
BtLoaderInfo.kernelAddr);

View File

@ -25,6 +25,7 @@
#include "init.h"
void MmInitPaging(void);
void MmActivatePageHandler(void);
//
// Entry point of the Kaleid kernel
@ -48,6 +49,7 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
// Memory
MmInitMemoryMap();
//MmInitGdt();
MmInitPaging();
MmInitHeap();
@ -60,6 +62,7 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
// Start drivers
KeEnableRTC();
IoEnableKeyb();
MmActivatePageHandler();
KeStartShell();

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@ -175,7 +175,7 @@ void KeSetupIDT(void)
// Load IDT
KeLoadIDT();
DebugLog("\tInterrupt table initialized\n");
DebugLog("\tInterrupt table initialized at %p\n", _KeIdtPtr.base);
}
//
@ -277,43 +277,50 @@ static void EarlyExceptionHandler(ISRFrame_t *regs)
{
KeStartPanic("[ISR 0x%x] Irrecoverable Kernel %s\n\n"
" Error code : 0x%x (%b)\n\n"
" RIP: %#016lx CS: %#016lx RSP: %#016lx\n"
" SS: %#016lx RAX: %#016lx RBX: %#016lx\n"
" RCX: %#016lx RDX: %#016lx RSI: %#016lx\n"
" RDI: %#016lx RBP: %#016lx R8: %#016lx\n"
" R9: %#016lx R10: %#016lx R11: %#016lx\n"
" R12: %#016lx R13: %#016lx R14: %#016lx\n"
" R15: %#016lx CR0: %#016lx CR2: %#016lx\n"
" CR3: %#016lx CR4: %#016lx CR8: %#016lx\n"
" RIP: %#016lx RSP: %#016lx RBP: %#016lx\n\n"
" SS: %#016lx CS: %#016lx CR0: %#016lx\n"
" CR2: %#016lx CR3: %#016lx CR4: %#016lx\n"
" CR8: %#016lx EFE: %#016lx \n\n"
" RAX: %#016lx RBX: %#016lx RCX: %#016lx\n"
" RDX: %#016lx RSI: %#016lx RDI: %#016lx\n"
" R8: %#016lx R9: %#016lx R10: %#016lx\n"
" R11: %#016lx R12: %#016lx R13: %#016lx\n"
" R14: %#016lx R15: %#016lx \n\n"
" RFLAGS: %#022b (%#06x)",
regs->intNo,
ExceptionsChar[regs->intNo],
regs->ErrorCode,
regs->ErrorCode,
regs->rip,
regs->cs,
regs->rsp,
regs->rbp,
regs->ss,
regs->regs[5],
regs->regs[6],
regs->regs[7],
regs->regs[8],
regs->regs[9],
regs->regs[10],
regs->regs[11],
regs->regs[12],
regs->regs[13],
regs->regs[14],
regs->regs[15],
regs->regs[16],
regs->regs[17],
regs->regs[18],
regs->regs[19],
regs->regs[0],
regs->regs[1],
regs->regs[2],
regs->regs[3],
regs->regs[4],
regs->cs,
regs->cr0,
regs->cr2,
regs->cr3,
regs->cr4,
regs->cr8,
regs->efer,
regs->rax,
regs->rbx,
regs->rcx,
regs->rdx,
regs->rsi,
regs->rdi,
regs->r8,
regs->r9,
regs->r10,
regs->r11,
regs->r12,
regs->r13,
regs->r14,
regs->r15,
regs->rflags,
regs->rflags
);

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@ -53,6 +53,9 @@ isrPreHandler:
push rax
mov rax, cr0
push rax
mov rcx, 0xC0000080
rdmsr
push rax
; Check if we are switching from user mode to supervisor mode
mov rax, [rsp + 152]
@ -84,7 +87,7 @@ isrPreHandler:
.SExit:
; pop the control registers
add rsp, 40
add rsp, 48
popAll
; pop the error code and interrupt id

View File

@ -33,24 +33,13 @@ global MmStoreGdt
;; Loads the GDT
;;
MmLoadGdt:
;; Loading the gdt via the gdtPtr pointer
lgdt [rel gdtPtr]
;; Reloading the segment registers
mov ax, si ; data segment
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov cs, di ; code segment
lgdt [gdtPtr]
;; We must far jump because we changed the GDT
lea rax, [rel .next]
lea rax, [.next]
push rax
ret
.next:
;ltr dx ; the TSS
ret

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@ -76,7 +76,7 @@ void MmInitGdt(void)
/* SetTssEntry(2, (ulong)&tssEntry, sizeof(TssEntry_t)); */
/* MmLoadGdt(0x8, 0x0, 2 << 3); */
MmLoadGdt();
}

View File

@ -41,7 +41,7 @@ void MmInitMemoryMap(void)
rc = InitMemoryMap();
if (rc)
KeStartPanic("\tThe memory map failed to initialize.\nError : %s",
KeStartPanic("Failed to initialize the memory map\nError : %s",
strerror(rc) );
}

View File

@ -2,8 +2,10 @@
#include <init/boot.h>
#include <ex/malloc.h>
#include <mm/mm.h>
#include <ke/idt.h>
#define PAGESIZE (4 * KB)
#define KPAGESIZE (4 * KB)
#define UPAGESIZE (2 * MB)
// Page directory pointer offset
@ -39,18 +41,19 @@ enum
//-----------
volatile pdpe_t MmPML4[512] __attribute__((__aligned__(4096)));
volatile pdpe_t MmPML4[512] __attribute__((__aligned__(KPAGESIZE)));
volatile pde_t MmPDP[512] __attribute__((__aligned__(4096)));
volatile pde_t MmPDP[512] __attribute__((__aligned__(KPAGESIZE)));
volatile pde_t MmPD[512 * RAM_MAX] __attribute__((__aligned__(4096)));;
volatile pde_t MmPD[512 * RAM_MAX] __attribute__((__aligned__(KPAGESIZE)));;
volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(4096)));;
volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(KPAGESIZE)));;
volatile ulong MmStackGuards[2] = { 0 };
//
// Creates our new page table structure and loads it
//
void MmInitPaging(void)
{
extern MemoryMap_t memoryMap;
@ -63,25 +66,25 @@ void MmInitPaging(void)
for (volatile ulong i = 0; i < 512 * NB_4K; i++) {
// STACK GUARD PAGE
if ((ulong)(i*4096) == (ulong)BtLoaderInfo.stackEndAddr) {
MmPT[i] = ((ulong)(i*4096));
if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.stackEndAddr) {
MmPT[i] = ((ulong)(i*KPAGESIZE));
MmStackGuards[0] = i;
continue;
}
// ENOMEM like
if ((ulong)(i*4096) > (ulong)phRamSize) {
if ((ulong)(i*KPAGESIZE) > (ulong)phRamSize) {
break;
}
// STACK GARD PAGE
if ((ulong)(i*4096) == (ulong)BtLoaderInfo.kernelEndAddr) {
MmPT[i] = ((ulong)(i*4096));
if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.kernelEndAddr) {
MmPT[i] = ((ulong)(i*KPAGESIZE));
MmStackGuards[1] = i;
continue;
}
MmPT[i] = ((ulong)(i*4096)) | MF_PRESENT | MF_READWRITE;
MmPT[i] = ((ulong)(i*KPAGESIZE)) | MF_PRESENT | MF_READWRITE;
}
for (volatile ulong i = 0; i < NB_4K; i++) {
@ -90,12 +93,12 @@ void MmInitPaging(void)
for (volatile ulong i = NB_4K; i < 512 * RAM_MAX; i++) {
// ENOMEM like
if ((ulong)(i* 2048 * 1024) > (ulong)phRamSize) {
if ((ulong)(i* UPAGESIZE) > (ulong)phRamSize) {
break;
}
MmPD[i] = 0;
MmPD[i] = ((ulong)(i* 2048 * 1024)) | MF_PRESENT | MF_READWRITE | MF_HUGE;
MmPD[i] = ((ulong)(i* UPAGESIZE)) | MF_PRESENT | MF_READWRITE | MF_HUGE;
}
for (volatile int i = 0; i < RAM_MAX; i++) {
@ -105,4 +108,114 @@ void MmInitPaging(void)
MmPML4[0] = (ulong)(&MmPDP[0])| MF_PRESENT | MF_READWRITE;
MmLoadPML4((void *)MmPML4);
DebugLog("\tPaging tables initialized at %p, %p\n", &MmPD, &MmPT);
}
//
// Reloads the page tables
//
void MmReloadPaging(void)
{
extern MemoryMap_t memoryMap;
ulong phRamSize = memoryMap.freeRamSize + memoryMap.nonfreeRamSize;
for (volatile ulong i = 0; i < 512 * NB_4K; i++) {
// STACK GUARD PAGE
if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.stackEndAddr) {
MmPT[i] = ((ulong)(i*KPAGESIZE));
MmStackGuards[0] = i;
continue;
}
// ENOMEM like
if ((ulong)(i*KPAGESIZE) > (ulong)phRamSize) {
break;
}
// STACK GARD PAGE
if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.kernelEndAddr) {
MmPT[i] = ((ulong)(i*KPAGESIZE));
MmStackGuards[1] = i;
continue;
}
MmPT[i] = ((ulong)(i*KPAGESIZE)) | MF_PRESENT | MF_READWRITE;
}
for (volatile ulong i = 0; i < NB_4K; i++) {
MmPD[i] = (ulong)(&MmPT[i*512])| MF_PRESENT | MF_READWRITE;
}
for (volatile ulong i = NB_4K; i < 512 * RAM_MAX; i++) {
// ENOMEM like
if ((ulong)(i* UPAGESIZE) > (ulong)phRamSize) {
break;
}
MmPD[i] = 0;
MmPD[i] = ((ulong)(i* UPAGESIZE)) | MF_PRESENT | MF_READWRITE | MF_HUGE;
}
DebugLog("Paging tables reloaded at %p, %p\n", &MmPD, &MmPT);
}
//
// Page fault handler
//
static void PagingHandler(ISRFrame_t *regs)
{
KeStartPanic("[ISR 0x%x] Irrecoverable Kernel Page Fault at %p\n\n"
" Error code : 0x%x (%b)\n\n"
" RIP: %#016lx RSP: %#016lx RBP: %#016lx\n\n"
" SS: %#016lx CS: %#016lx CR0: %#016lx\n"
" CR2: %#016lx CR3: %#016lx CR4: %#016lx\n"
" CR8: %#016lx EFE: %#016lx \n\n"
" RAX: %#016lx RBX: %#016lx RCX: %#016lx\n"
" RDX: %#016lx RSI: %#016lx RDI: %#016lx\n"
" R8: %#016lx R9: %#016lx R10: %#016lx\n"
" R11: %#016lx R12: %#016lx R13: %#016lx\n"
" R14: %#016lx R15: %#016lx \n\n"
" RFLAGS: %#022b (%#06x)",
regs->intNo,
regs->cr2,
regs->ErrorCode,
regs->ErrorCode,
regs->rip,
regs->rsp,
regs->rbp,
regs->ss,
regs->cs,
regs->cr0,
regs->cr2,
regs->cr3,
regs->cr4,
regs->cr8,
regs->efer,
regs->rax,
regs->rbx,
regs->rcx,
regs->rdx,
regs->rsi,
regs->rdi,
regs->r8,
regs->r9,
regs->r10,
regs->r11,
regs->r12,
regs->r13,
regs->r14,
regs->r15,
regs->rflags,
regs->rflags
);
}
void MmActivatePageHandler(void)
{
KeRegisterISR(PagingHandler, 0xe);
}

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@ -251,11 +251,11 @@ error_t CmdArgs(int argc, char **argv, char *cmdline)
return EOK;
}
void MmInitPaging(void);
void MmReloadPaging(void);
error_t CmdReloadPage(int argc, char **argv, char *cmdline)
{
MmInitPaging();
MmReloadPaging();
return EOK;
}