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Enumerating PCI bus according to the actual MCFG size and not maximum

This commit is contained in:
Adrien Bourmault 2020-02-17 19:17:52 +01:00
parent 26446515b3
commit da0bf304aa
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GPG Key ID: AFEE5788AEE3F4EC
1 changed files with 4 additions and 1 deletions
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5
kaleid/kernel/io/pci.c
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@ -27,6 +27,7 @@
#include <mm/paging.h>
static void *pciConfigBaseAddress = NULL;
static MCFG_t *MCFG_table = NULL;
// -------------------------------------------------------------------------- //
@ -114,6 +115,7 @@ void IoPciEnumerate()
for(uchar device = 0; device < 32; device++) {
for(uchar function = 0; function < 8; function++) {
ushort vendor = pciReadConfigWord((uchar)bus, device, function, PCI_REG_VENDOR);
if(bus * device * function > MCFG_table->length) break;
if(vendor == 0xffff) continue;
DebugLog("PCI device class: %x, subclass: %x, vendor: %x, device: %x\n",
pciReadConfigByte((uchar)bus, device, function, PCI_REG_CLASS),
@ -138,6 +140,7 @@ PciDev_t *IoPciGetDevice(ushort vendorID, ushort deviceID)
for(uchar function = 0; function < 8; function++) {
if(vendorID == pciReadConfigWord((uchar)bus, device, function, PCI_REG_VENDOR)
&& deviceID == pciReadConfigWord((uchar)bus, device, function, PCI_REG_DEVICE)) {
if(bus * device * function > MCFG_table->length) break;
PciDev_t *pciDevicePtr = (PciDev_t *)malloc(sizeof(PciDev_t));
pciDevicePtr->vendorID = vendorID;
pciDevicePtr->deviceID = deviceID;
@ -180,7 +183,7 @@ PciDev_t *IoPciGetDeviceByClass(uchar classID, uchar subclassID)
void IoInitPCI()
{
MCFG_t *MCFG_table = (MCFG_t*)IoGetAcpiTable(SDT_MCFG);
MCFG_table = (MCFG_t*)IoGetAcpiTable(SDT_MCFG);
if(MCFG_table == NULL) {
KeStartPanic("Unable to access PCI configuration : MCFG table not reachable\n");
}