;=----------------------------------------------------------------------------=; ; GNU GPL OS/K ; ; ; ; Desc: Memory management from protected mode ; ; (x86_64 architecture only) ; ; ; ; ; ; Copyright © 2018-2019 The OS/K Team ; ; ; ; This file is part of OS/K. ; ; ; ; OS/K is free software: you can redistribute it and/or modify ; ; it under the terms of the GNU General Public License as published by ; ; the Free Software Foundation, either version 3 of the License, or ; ; (at your option) any later version. ; ; ; ; OS/K is distributed in the hope that it will be useful, ; ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; ; GNU General Public License for more details. ; ; ; ; You should have received a copy of the GNU General Public License ; ; along with OS/K. If not, see . ; ;=----------------------------------------------------------------------------=; [BITS 32] ; ---------------------------------------------------------------------------- ; ; Constructor for the page tables in protected mode ; ; ---------------------------------------------------------------------------- ; Setup_paging: ;; Map the first PML4 entry to PDP table mov eax, PDP_table or eax, 0b11 ; present + writable mov [PML4_table], eax ;; Map the first PDP entry to PD table mov eax, PD_table or eax, 0b11 ; present + writable mov [PDP_table], eax ;; Map each PD entry to a 'huge' 2MiB page mov ecx, 0 ; counter variable .map_p2_table: ;; map ecx-th PD entry to a huge page that starts at address 2MiB*ecx mov eax, 0x200000 mul ecx ; start address of ecx-th page or eax, 0b10000011 ; present + writable + huge mov [PD_table + ecx * 8], eax inc ecx cmp ecx, 512 ; if counter == 512, the whole PD table is mapped jne .map_p2_table ; else map the next entry ret ; ---------------------------------------------------------------------------- ; ; Enable long mode and paging ; ; ---------------------------------------------------------------------------- ; Go64: ;; Registering paging mov eax, PML4_table mov cr3, eax ; Load PML4 to cr3 mov eax, cr4 or eax, 1 << 5 mov cr4, eax ; Enable PAE ;; Activate long mode mov ecx, 0xC0000080 ; address of MSR rdmsr ; read MSR or eax, 1 << 8 ; LME = 1. (Long Mode Enable) wrmsr ; write MSR ;; Enable paging mov eax, cr0 or eax, 1 << 31 ; make MSR bit 31 (PG = Paging) to 1 : ; |1|000000000000000000000000000000 ; | ; `------ Paging bit mov cr0, eax ret