#include #define PAGESIZE (4 * KB) // Page directory pointer offset typedef ulong pdpe_t; // Page directory offset typedef ulong pde_t; // Page table entry typedef ulong pte_t; // paging.asm void MmLoadPML4(void *); void MmEnableWriteProtect(void); void MmDisableWriteProtect(void); enum { MF_PRESENT = 1 << 0, MF_READWRITE = 1 << 1, MF_USERMODE = 1 << 2, MF_WRITETHR = 1 << 3, MF_CACHEDIS = 1 << 4, MF_ACCESSED = 1 << 5, MF_DIRTY = 1 << 6, MF_HUGE = 1 << 7 }; #define RAM 8 #define NB_4K 2 //----------- volatile pdpe_t PML4[512] __attribute__((__aligned__(4096))); volatile pde_t PDP[512] __attribute__((__aligned__(4096))); volatile pde_t PD[512 * RAM] __attribute__((__aligned__(4096))); volatile pte_t PT[512 * NB_4K] __attribute__((__aligned__(4096))); void MmInitPaging(void) { memzero((void *)&PML4[0], sizeof(PML4)); memzero((void *)&PDP[0], sizeof(PDP)); memzero((void *)&PD[0], sizeof(PD)); memzero((void *)&PT[0], sizeof(PT)); for (int i = 0; i < 512 * NB_4K; i++) { PT[i] = ((ulong)i * 4096) | MF_PRESENT | MF_READWRITE; } for (int i = 0; i < NB_4K; i++) { PD[i] = (ulong)(&PT[i*512])| MF_PRESENT | MF_READWRITE; } for (int i = NB_4K; i < 512 * RAM; i++) { PD[i] = ((ulong)i * 2048 * 1024) | MF_PRESENT | MF_READWRITE | MF_HUGE; } for (int i = 0; i < RAM; i++) { PDP[i] = (ulong)(&PD[i*512])| MF_PRESENT | MF_READWRITE; } PML4[0] = (ulong)(&PDP[0])| MF_PRESENT | MF_READWRITE; MmLoadPML4((void *)PML4); }