492 lines
18 KiB
C
492 lines
18 KiB
C
//----------------------------------------------------------------------------//
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// GNU GPL OS/K //
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// //
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// Desc: Paging memory related functions //
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// //
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// //
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// Copyright © 2018-2019 The OS/K Team //
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// //
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// This file is part of OS/K. //
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// //
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// OS/K is free software: you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation, either version 3 of the License, or //
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// any later version. //
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// //
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// OS/K is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY//without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
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//----------------------------------------------------------------------------//
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#include <kernel.h>
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#include <init/boot.h>
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#include <ke/idt.h>
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#include <ex/malloc.h>
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#include <mm/heap.h>
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#include <mm/paging.h>
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#include <mm/map.h>
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#include <lib/buf.h>
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#include <io/vga.h>
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#include <ke/time.h>
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//-----------
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static pml4_t MmPageMapLevel4[512] __attribute__((__aligned__(KPAGESIZE)));
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static ulong *MmPhysicalPageTable __attribute__((__aligned__(KPAGESIZE)));
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extern ulong _text;
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extern ulong _text_end;
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extern ulong _rodata;
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extern ulong _rodata_end;
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extern ulong _data;
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extern ulong _data_end;
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extern MemoryMap_t memoryMap;
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static ulong MmStackGuards[2] = { 0 };
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ulong MmVirtLastAddress = 0;
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ulong MmPhysLastKernAddress = 0;
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//-----------
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//
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// Creates our new page table structure and loads it
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//
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void MmInitPaging(void)
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{
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pdpe_t *MmPDP = NULL;
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pde_t *MmPD = NULL;
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pte_t *MmPT = NULL;
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ulong index, xedni;
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ulong curAddrPML4;
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ulong curAddrPDP;
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ulong curAddrPD;
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ulong curAddrPT;
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ulong firstDirectoryAddr = 0;
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ulong lastDirectoryAddr = 0;
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ulong phDirSize = 0;
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KernLog("\tActivating paging...\n");
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// Maximum PHYSICAL address in memory
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ulong phRamSize = memoryMap.freeRamSize + memoryMap.nonfreeRamSize;
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// Difference between the end of kernel and the begin of userspace
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MmPhysLastKernAddress = (ulong)(_heap_start + _heap_max);
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// Size of physical table
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phDirSize = (((phRamSize + KPAGESIZE) / KPAGESIZE)*sizeof(ulong));
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// Maximum VIRTUAL address in memory
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MmVirtLastAddress = phRamSize;
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// Alloc structures
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memzero((void *)&MmPageMapLevel4[0], 512*sizeof(ulong));
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MmPhysicalPageTable = memalign(phDirSize, KPAGESIZE);
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//DebugLog("\t\t\t\tPhysical map addr : %p\n", MmPhysicalPageTable);
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for (curAddrPML4 = 0;
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curAddrPML4 < 512 * KPAGESIZE * 0x8000000;
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curAddrPML4 += ((ulong)KPAGESIZE * 0x8000000)) {
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// Create an entry in PML4 each 512GB
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// 0x8000000 = 512 ^ 3
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index = (curAddrPML4 / ((ulong)KPAGESIZE * 0x8000000)) % 512;
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if (curAddrPML4 > MmPhysLastKernAddress) {
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MmPageMapLevel4[index] = (pdpe_t *)0;
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////DebugLog("PML4 %d\n", index);
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continue;
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}
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MmPDP = memalign(512*sizeof(pde_t), KPAGESIZE);
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if (!firstDirectoryAddr) {
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firstDirectoryAddr = (ulong)MmPDP;
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}
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//DebugLog("\t\t\t\tPDP %d : %p\n", index, MmPDP);
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MmPageMapLevel4[index] = (pdpe_t *)((ulong)MmPDP | PRESENT
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| READWRITE);
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for (curAddrPDP = curAddrPML4;
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curAddrPDP < (curAddrPML4 + ((ulong)KPAGESIZE * 0x8000000));
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curAddrPDP += ((ulong)KPAGESIZE * 0x40000)) {
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// Create an intry in PDP each 1GB
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// 0x40000 = 512 ^ 2
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index = (curAddrPDP / ((ulong)KPAGESIZE * 0x40000)) % 512;
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if (curAddrPDP > MmPhysLastKernAddress) {
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MmPDP[index] = (pde_t *)0;
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//DebugLog("PDP %d\n", index);
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continue;
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}
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MmPD = memalign(512*sizeof(pde_t), KPAGESIZE);
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index = (curAddrPDP / ((ulong)KPAGESIZE * 0x40000)) % 512;
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//DebugLog("\t\t\t\tPD %d : %p\n", index, MmPD);
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MmPDP[index] = (pde_t *)((ulong)MmPD | PRESENT | READWRITE);
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for (curAddrPD = curAddrPDP;
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curAddrPD < (curAddrPDP + ((ulong)KPAGESIZE * 0x40000));
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curAddrPD += ((ulong)KPAGESIZE * 0x200)) {
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// Create an intry in PD each 2MB
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// 0x200 = 512
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index = (curAddrPD / ((ulong)KPAGESIZE * 0x200))
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% 512;
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if (curAddrPD > MmPhysLastKernAddress) {
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MmPD[index] = (pte_t *)0;
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//DebugLog("PD %d\n", index);
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continue;
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}
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MmPT = memalign(512*sizeof(pte_t), KPAGESIZE);
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//DebugLog("\t\t\t\tPT %d : %p\n", index, MmPT);
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MmPD[index] = (pte_t *)((ulong)MmPT | PRESENT
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| READWRITE);
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for (curAddrPT = curAddrPD;
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curAddrPT < (curAddrPD + ((ulong)KPAGESIZE * 0x200));
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curAddrPT += (ulong)KPAGESIZE) {
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// Create an entry in PT each page of 4KB
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index = (curAddrPT / ((ulong)KPAGESIZE)) % 512;
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xedni = (curAddrPT / ((ulong)KPAGESIZE));
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// STACK GUARD PAGE */
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if ((ulong)curAddrPT ==
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(ulong)BtLoaderInfo.stackEndAddr) {
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MmPT[index] = (ulong)curAddrPT | PRESENT;
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MmPhysicalPageTable[xedni] = (ulong)curAddrPT;
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MmStackGuards[0] = (ulong)curAddrPT;
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//DebugLog("\tStack Guard at %p\n", curAddrPT);
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}
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else if ((ulong)curAddrPT ==
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(ulong)BtLoaderInfo.kernelEndAddr) {
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MmPT[index] = (ulong)curAddrPT | PRESENT;
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MmPhysicalPageTable[xedni] = (ulong)curAddrPT;
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MmStackGuards[1] = (ulong)curAddrPT;
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//DebugLog("\tStack Guard at %p\n", curAddrPT);
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}
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// SECTION .TEXT PROTECTION
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else if ((ulong)curAddrPT >= (ulong)&_text
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&& (ulong)curAddrPT <= (ulong)&_text_end) {
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MmPT[index] = (ulong)curAddrPT | PRESENT;
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MmPhysicalPageTable[xedni] = (ulong)curAddrPT;
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//DebugLog("\tSection .text at %p\n", curAddrPT);
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}
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// SECTION .DATA PROTECTION
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else if ((ulong)curAddrPT >= (ulong)&_data
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&& (ulong)curAddrPT <= (ulong)&_data_end) {
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MmPT[index] = (ulong)curAddrPT | PRESENT
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| WRITETHR
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| READWRITE
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| NX;
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MmPhysicalPageTable[xedni] = (ulong)curAddrPT;
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//DebugLog("\tSection .data at %p\n", curAddrPT);
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}
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// SECTION .RODATA PROTECTION
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else if ((ulong)curAddrPT >= (ulong)&_rodata
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&& (ulong)curAddrPT <= (ulong)&_rodata_end) {
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MmPT[index] = (ulong)curAddrPT | PRESENT | NX;
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MmPhysicalPageTable[xedni] = (ulong)curAddrPT;
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//DebugLog("\tSection .rodata at %p\n", curAddrPT);
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}
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// While we're inside the kernel pages
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else if ((ulong)curAddrPT <= MmPhysLastKernAddress) {
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MmPT[index] = (ulong)curAddrPT | PRESENT
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| READWRITE;
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MmPhysicalPageTable[xedni] = (ulong)curAddrPT;
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}
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}
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}
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}
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}
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lastDirectoryAddr = (ulong)MmPT;
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MmLoadPML4((void *)MmPageMapLevel4);
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MmEnableWriteProtect();
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DebugLog("\tPage table size : %u MB\n", (lastDirectoryAddr - firstDirectoryAddr + phDirSize)/MB);
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}
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//
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// Get a page from an address
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//
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ulong *MmGetPageDescriptorFromVirtual(void *virtualAddr)
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{
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// Select bit from 39 to 47
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register ulong pml4Index = ((ulong)virtualAddr & 0xFF8000000000) >> 39;
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// Select bit from 30 to 39
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register ulong pdpIndex = ((ulong)virtualAddr & 0x7FC0000000) >> 30;
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// etc etc
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register ulong pdIndex = ((ulong)virtualAddr & 0x3FE00000) >> 21;
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// etc
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register ulong ptIndex = ((ulong)virtualAddr & 0x1FF000) >> 12;
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pdpe_t *pdp = NULL;
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pde_t *pd = NULL;
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pte_t *pt = NULL;
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//DebugLog("PML4[%d], PDP[%d], PD[%d], PT[%d]\n",
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// pml4Index, pdpIndex, pdIndex, ptIndex);
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// Select bit from 12 to 51
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if (!((ulong)MmPageMapLevel4[pml4Index] & 0xFFFFFFFFFF000)) {
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// Alloc space
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MmPageMapLevel4[pml4Index] = memalign(512*sizeof(pdpe_t), KPAGESIZE);
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// Set present
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MmPageMapLevel4[pml4Index] =
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(pml4_t)((ulong)MmPageMapLevel4[pml4Index] | PRESENT | READWRITE);
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pdp = (pdpe_t *)((ulong)MmPageMapLevel4[pml4Index] & 0xFFFFFFFFFF000);
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//DebugLog("\tCreate PDP at %p\n", MmPageMapLevel4[pml4Index]);
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} else {
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pdp = (pdpe_t *)((ulong)MmPageMapLevel4[pml4Index] & 0xFFFFFFFFFF000);
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}
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//DebugLog("\tPDP[%d] = %p\n", pdpIndex, pdp[pdpIndex]);
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// Select bit from 12 to 51
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if (!((ulong)pdp[pdpIndex] & 0xFFFFFFFFFF000)) {
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pdp[pdpIndex] = memalign(512*sizeof(pde_t), KPAGESIZE);
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pdp[pdpIndex] = (pdpe_t)((ulong)pdp[pdpIndex] | PRESENT | READWRITE);
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pd = (pde_t *)((ulong)pdp[pdpIndex] & 0xFFFFFFFFFF000);
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//DebugLog("\tCreate PD at %p\n", (ulong)pdp[pdpIndex]);
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} else {
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pd = (pde_t *)((ulong)pdp[pdpIndex] & 0xFFFFFFFFFF000);
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}
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DebugLog("\tPD[%d] = %p\n", pdIndex, pd[pdIndex]);
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// Select bit from 12 to 51
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if (!((ulong)pd[pdIndex] & 0xFFFFFFFFFF000)) {
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pd[pdIndex] = memalign(512*sizeof(pte_t), KPAGESIZE);
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pd[pdIndex] = (pde_t)((ulong)pd[pdIndex] | PRESENT | READWRITE);
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pt = (pte_t *)((ulong)pd[pdIndex] & 0xFFFFFFFFFF000);
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//DebugLog("\tCreate PT at %p\n", (ulong)pd[pdIndex]);
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} else {
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pt = (pte_t *)((ulong)pd[pdIndex] & 0xFFFFFFFFFF000);
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}
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//DebugLog("\tPT[%d] = %p\n", ptIndex, pt[ptIndex]);
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MmLoadPML4((void *)MmPageMapLevel4);
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return &pt[ptIndex];
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}
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//
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// Translates a virtual address to its physical equivalent
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//
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void *MmTransVirtToPhyAddr(void* virtualAddr)
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{
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ulong virtAddrPage = (ulong)virtualAddr & ( ~(KPAGESIZE - 1));
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ulong *page = MmGetPageDescriptorFromVirtual(virtualAddr);
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if (!(page)) {
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return NULL;
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}
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return (void*)(((ulong)*page & 0xFFFFFFFFFF000)+ ((ulong)virtualAddr - (ulong)virtAddrPage));
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}
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void *MmTransPhyToVirtAddr(void* physicalAddr)
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{
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ulong phyAddrPage = (ulong)physicalAddr & ( ~((KPAGESIZE - 1) | NX));
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return (void*)( MmPhysicalPageTable[(ulong)physicalAddr
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/ ((ulong)KPAGESIZE)
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] + ((ulong)physicalAddr - phyAddrPage));
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}
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//
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// Add flags to a page
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//
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void MmSetPage(void* virtualAddr, ulong flags)
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{
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ulong *page = MmGetPageDescriptorFromVirtual(virtualAddr);
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*page |= flags;
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KeFlushTlbSingle(virtualAddr);
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}
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//
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// Remove flags of a page
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//
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void MmUnsetPage(void* virtualAddr, ulong flags)
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{
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ulong *page = MmGetPageDescriptorFromVirtual(virtualAddr);
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*page |= flags;
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KeFlushTlbSingle(virtualAddr);
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}
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//
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// Map a page in memory
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//
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void MmMapPage(void* virtualAddr, void* physicalAddr, ulong flags)
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{
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//DebugLog("Request %p:%p with %lu\n", virtualAddr, physicalAddr, flags);
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ulong *page = MmGetPageDescriptorFromVirtual(virtualAddr);
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*page = (ulong)physicalAddr | flags;
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MmPhysicalPageTable[(ulong)physicalAddr
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/ ((ulong)KPAGESIZE)
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] = (ulong)virtualAddr;
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KeFlushTlbSingle(virtualAddr);
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//DebugLog("Done %p at page %p\n", *page, page);
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if ((ulong)virtualAddr > MmVirtLastAddress)
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MmVirtLastAddress = (ulong)virtualAddr + KPAGESIZE;
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}
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//
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// Unmap a page in memory
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//
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void MmUnmapPage(void* virtualAddr)
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{
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ulong *page = MmGetPageDescriptorFromVirtual(virtualAddr);
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/* MmPhysicalPageTable[(ulong)(MmTransVirtToPhyAddr(virtualAddr)) */
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/* / ((ulong)KPAGESIZE) */
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/* ] = 0; */
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/* pt[ */
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/* (virtualAddr / (ulong)KPAGESIZE) % 512 */
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/* ] = 0; */
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KeFlushTlbSingle(virtualAddr);
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}
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//-----------
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//
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// Returns the rank of the Stack Guards
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//
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void *MmGetStackGuards(char rank)
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{
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return (void *)MmStackGuards[(int)rank];
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}
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//
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// Page fault handler
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//
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static void PagingHandler(ISRFrame_t *regs)
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{
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ulong StackGuardOne = (ulong)MmGetStackGuards(0);
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ulong StackGuardTwo = (ulong)MmGetStackGuards(1);
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if ((regs->cr2 >= StackGuardOne) && (regs->cr2 <= StackGuardOne + KPAGESIZE) && (regs->rsp <= regs->cr2)) {
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bprintf(BStdOut,
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"\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Stack Underflow\n\n"
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" Page Fault Error code : %#x (%b)\n"
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" Stack Guard bypassed : %#x",
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VGA_COLOR_LIGHT_RED,
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regs->ErrorCode,
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regs->ErrorCode,
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StackGuardOne
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);
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} else if ((regs->cr2 >= StackGuardTwo) && (regs->cr2 <= StackGuardTwo + KPAGESIZE) && (regs->rsp >= regs->cr2)) {
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bprintf(BStdOut,
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"\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Stack Overflow\n\n"
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" Page Fault Error code : %#x (%b)\n"
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" Stack Guard bypassed : %#x",
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VGA_COLOR_LIGHT_RED,
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regs->ErrorCode,
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regs->ErrorCode,
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StackGuardTwo
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);
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} else if (regs->cr2 == 0) {
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bprintf(BStdOut,
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"\n\n%CPANIC\n[ISR 0x8] Null vector exception !\n\n"
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" Page Fault Error code : %#x (%b)\n",
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VGA_COLOR_LIGHT_RED,
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regs->intNo,
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regs->ErrorCode,
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regs->ErrorCode
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);
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} else if (regs->cr2 >= MmVirtLastAddress || regs->cr2 <= 0) {
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bprintf(BStdOut,
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"\n\n%CPANIC\n[ISR 0x8] Out of bound of the address space at %p !\n\n"
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" End of the address space : %p\n"
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" Page Fault Error code : %#x (%b)\n",
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VGA_COLOR_LIGHT_RED,
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regs->cr2,
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MmVirtLastAddress,
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regs->ErrorCode,
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regs->ErrorCode
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);
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} else {
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//XXX page fault
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bprintf(BStdOut, "\n\n%CPANIC\n[ISR 0x8] Irrecoverable Page Fault at %p\n\n"
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" Error code : 0x%x (%b)",
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VGA_COLOR_LIGHT_RED,
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regs->cr2,
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regs->ErrorCode,
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regs->ErrorCode
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);
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}
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bprintf(BStdOut, "\n Description : ");
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if (regs->ErrorCode & PRESENT) {
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bprintf(BStdOut, "Page-protection violation ");
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} else {
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bprintf(BStdOut, "Non present page ");
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}
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if (regs->ErrorCode & READWRITE) {
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bprintf(BStdOut, "during write access ");
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} else {
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bprintf(BStdOut, "during read access ");
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}
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if (regs->ErrorCode & (1 << 3))
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bprintf(BStdOut, "from userspace ");
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if (regs->ErrorCode & (1 << 4))
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bprintf(BStdOut, "after instruction fetching ");
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KeBrkDumpRegisters(regs);
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BStdOut->flusher(BStdOut);
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KeHaltCPU();
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}
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void MmActivatePageHandler(void)
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{
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KeRegisterISR(PagingHandler, 0xe);
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//DebugLog("\tPage handler activated\n");
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}
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