42 lines
1.2 KiB
Text
42 lines
1.2 KiB
Text
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018 Tristan Corrick <tristan@corrick.kiwi>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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0x03, /* DSDT Revision: ACPI v3.0 */
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"COREv4", /* OEM ID */
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"COREBOOT", /* OEM Table ID */
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0x20181031 /* OEM Revision */
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)
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{
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#include "acpi/platform.asl"
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
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#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
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#include <cpu/intel/haswell/acpi/cpu.asl>
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Scope (\_SB)
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{
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Device (PCI0)
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{
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#include <northbridge/intel/haswell/acpi/haswell.asl>
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#include <southbridge/intel/lynxpoint/acpi/pch.asl>
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#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
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}
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}
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}
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