2015-11-17 15:57:39 +01:00
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/*
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* This file is part of the coreboot project.
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*
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2016-10-08 22:49:41 +02:00
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* Copyright (C) 2015 - 2016 Advanced Micro Devices, Inc.
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2015-11-17 15:57:39 +01:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* ROMSIG At ROMBASE + 0x20000:
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2016-02-19 06:47:31 +01:00
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* 0 4 8 C
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2015-11-17 15:57:39 +01:00
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* +------------+---------------+----------------+------------+
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* | 0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
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* +------------+---------------+----------------+------------+
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2016-02-19 06:47:31 +01:00
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* | PSPDIR ADDR|PSPDIR ADDR |<-- Field 0x14 could be either
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* +------------+---------------+ 2nd PSP directory or PSP COMBO directory
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2015-11-17 15:57:39 +01:00
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* EC ROM should be 64K aligned.
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*
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2015-11-20 05:29:04 +01:00
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* PSP directory (Where "PSPDIR ADDR" points)
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2015-11-17 15:57:39 +01:00
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* +------------+---------------+----------------+------------+
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* | 'PSP$' | Fletcher | Count | Reserved |
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* +------------+---------------+----------------+------------+
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* | 0 | size | Base address | Reserved | Pubkey
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* +------------+---------------+----------------+------------+
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* | 1 | size | Base address | Reserved | Bootloader
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* +------------+---------------+----------------+------------+
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* | 8 | size | Base address | Reserved | Smu Firmware
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* +------------+---------------+----------------+------------+
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* | 3 | size | Base address | Reserved | Recovery Firmware
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* +------------+---------------+----------------+------------+
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* | |
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* | |
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* | Other PSP Firmware |
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* | |
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* | |
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* +------------+---------------+----------------+------------+
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2015-11-20 05:29:04 +01:00
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*
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2016-02-19 06:47:31 +01:00
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* PSP Combo directory
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2015-11-20 05:29:04 +01:00
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* +------------+---------------+----------------+------------+
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2016-02-19 06:34:59 +01:00
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* | 'PSP2' | Fletcher | Count |Look up mode|
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2015-11-20 05:29:04 +01:00
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* +------------+---------------+----------------+------------+
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2016-03-02 07:47:27 +01:00
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* | R e s e r v e d |
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* +------------+---------------+----------------+------------+
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2016-02-19 06:34:59 +01:00
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* | ID-Sel | PSP ID | PSPDIR ADDR | | 2nd PSP directory
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2015-11-20 05:29:04 +01:00
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* +------------+---------------+----------------+------------+
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2016-02-19 06:34:59 +01:00
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* | ID-Sel | PSP ID | PSPDIR ADDR | | 3rd PSP directory
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2015-11-20 05:29:04 +01:00
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* +------------+---------------+----------------+------------+
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* | |
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* | Other PSP |
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* | |
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* +------------+---------------+----------------+------------+
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*
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2015-11-17 15:57:39 +01:00
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*/
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#include <fcntl.h>
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#include <errno.h>
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#include <stdio.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <unistd.h>
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#include <string.h>
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#include <stdlib.h>
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#include <getopt.h>
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#ifndef CONFIG_ROM_SIZE
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#define CONFIG_ROM_SIZE 0x400000
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#endif
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2016-11-08 17:55:01 +01:00
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#define AMD_ROMSIG_OFFSET 0x20000
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#define MIN_ROM_KB 256
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2015-11-17 15:57:39 +01:00
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2016-11-08 19:34:02 +01:00
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#define ALIGN(val, by) (((val) + (by) - 1) & ~((by) - 1))
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2019-03-05 00:53:15 +01:00
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#define TABLE_ALIGNMENT 0x1000U
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#define BLOB_ALIGNMENT 0x100U
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2015-11-17 15:57:39 +01:00
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2019-02-24 00:42:46 +01:00
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#define EMBEDDED_FW_SIGNATURE 0x55aa55aa
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#define PSP_COOKIE 0x50535024 /* 'PSP$' */
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#define PSP2_COOKIE 0x50535032 /* 'PSP2' */
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2015-11-17 15:57:39 +01:00
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/*
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2019-03-05 00:50:37 +01:00
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* Beginning with Family 15h Models 70h-7F, a.k.a Stoney Ridge, the PSP
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* can support an optional "combo" implementation. If the PSP sees the
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* PSP2 cookie, it interprets the table as a roadmap to additional PSP
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* tables. Using this, support for multiple product generations may be
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* built into one image. If the PSP$ cookie is found, the table is a
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* normal directory table.
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*
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* Modern generations supporting the combo directories require the
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* pointer to be at offset 0x14 of the Embedded Firmware Structure,
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* regardless of the type of directory used. The --combo-capable
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* argument enforces this placement.
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*
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* TODO: Future work may require fully implementing the PSP_COMBO feature.
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2016-02-19 06:47:31 +01:00
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*/
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2019-03-05 00:50:37 +01:00
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#define PSP_COMBO 0
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2015-11-17 15:57:39 +01:00
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2019-02-24 00:42:46 +01:00
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typedef unsigned long long int uint64_t;
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2015-11-17 15:57:39 +01:00
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typedef unsigned int uint32_t;
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typedef unsigned char uint8_t;
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typedef unsigned short uint16_t;
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/*
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* Creates the OSI Fletcher checksum. See 8473-1, Appendix C, section C.3.
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* The checksum field of the passed PDU does not need to be reset to zero.
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*
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* The "Fletcher Checksum" was proposed in a paper by John G. Fletcher of
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* Lawrence Livermore Labs. The Fletcher Checksum was proposed as an
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* alternative to cyclical redundancy checks because it provides error-
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* detection properties similar to cyclical redundancy checks but at the
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* cost of a simple summation technique. Its characteristics were first
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* published in IEEE Transactions on Communications in January 1982. One
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* version has been adopted by ISO for use in the class-4 transport layer
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* of the network protocol.
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*
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* This program expects:
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* stdin: The input file to compute a checksum for. The input file
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* not be longer than 256 bytes.
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* stdout: Copied from the input file with the Fletcher's Checksum
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* inserted 8 bytes after the beginning of the file.
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* stderr: Used to print out error messages.
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*/
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2019-02-24 15:18:44 +01:00
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static uint32_t fletcher32(const void *data, int length)
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2015-11-17 15:57:39 +01:00
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{
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uint32_t c0;
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uint32_t c1;
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uint32_t checksum;
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int index;
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2019-02-24 15:18:44 +01:00
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const uint16_t *pptr = data;
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length /= 2;
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2015-11-17 15:57:39 +01:00
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c0 = 0xFFFF;
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c1 = 0xFFFF;
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for (index = 0; index < length; index++) {
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/*
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* Ignore the contents of the checksum field.
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*/
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c0 += *(pptr++);
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c1 += c0;
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if ((index % 360) == 0) {
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2019-02-24 15:18:44 +01:00
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/* Sums[0,1] mod 64K + overflow */
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c0 = (c0 & 0xFFFF) + (c0 >> 16);
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c1 = (c1 & 0xFFFF) + (c1 >> 16);
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2015-11-17 15:57:39 +01:00
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}
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}
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2019-02-24 15:18:44 +01:00
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/* Sums[0,1] mod 64K + overflow */
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c0 = (c0 & 0xFFFF) + (c0 >> 16);
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c1 = (c1 & 0xFFFF) + (c1 >> 16);
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2015-11-17 15:57:39 +01:00
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checksum = (c1 << 16) | c0;
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return checksum;
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}
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2016-11-08 18:44:18 +01:00
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static void usage(void)
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2015-11-17 15:57:39 +01:00
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{
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2016-11-08 18:37:53 +01:00
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printf("amdfwtool: Create AMD Firmware combination\n");
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printf("Usage: amdfwtool [options] -f <size> -o <filename>\n");
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2017-03-17 23:30:51 +01:00
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printf("-x | --xhci <FILE> Add XHCI blob\n");
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printf("-i | --imc <FILE> Add IMC blob\n");
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printf("-g | --gec <FILE> Add GEC blob\n");
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2016-11-08 18:37:53 +01:00
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printf("\nPSP options:\n");
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2019-02-28 19:43:40 +01:00
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printf("-A | --combo-capable Place PSP directory pointer at Embedded Firmware\n");
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printf(" offset able to support combo directory\n");
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2017-03-17 23:30:51 +01:00
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printf("-p | --pubkey <FILE> Add pubkey\n");
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printf("-b | --bootloader <FILE> Add bootloader\n");
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printf("-s | --smufirmware <FILE> Add smufirmware\n");
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2019-02-28 19:43:40 +01:00
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printf("-j | --smufnfirmware <FILE> Add fanless smufirmware\n");
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2017-03-17 23:30:51 +01:00
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printf("-r | --recovery <FILE> Add recovery\n");
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printf("-k | --rtmpubkey <FILE> Add rtmpubkey\n");
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printf("-c | --secureos <FILE> Add secureos\n");
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printf("-n | --nvram <FILE> Add nvram\n");
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printf("-d | --securedebug <FILE> Add securedebug\n");
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printf("-t | --trustlets <FILE> Add trustlets\n");
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printf("-u | --trustletkey <FILE> Add trustletkey\n");
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printf("-w | --smufirmware2 <FILE> Add smufirmware2\n");
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2019-02-28 19:43:40 +01:00
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printf("-e | --smufnfirmware2 <FILE> Add fanless smufirmware2\n");
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2017-03-17 23:30:51 +01:00
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printf("-m | --smuscs <FILE> Add smuscs\n");
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2016-11-08 18:37:53 +01:00
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printf("\n-o | --output <filename> output filename\n");
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2017-03-17 23:30:51 +01:00
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printf("-f | --flashsize <HEX_VAL> ROM size in bytes\n");
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printf(" size must be larger than %dKB\n",
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2016-11-08 18:37:53 +01:00
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MIN_ROM_KB);
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2017-03-17 23:30:51 +01:00
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printf(" and must a multiple of 1024\n");
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2017-10-03 22:16:04 +02:00
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printf("-l | --location Location of Directory\n");
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2017-03-17 23:30:51 +01:00
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printf("-h | --help show this help\n");
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2015-11-17 15:57:39 +01:00
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}
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2017-03-17 23:30:51 +01:00
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#define FANLESS_FW 0x100 /* type[15:8]: 0=non-fanless OPNs, 1=fanless */
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2015-11-17 15:57:39 +01:00
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typedef enum _amd_fw_type {
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AMD_FW_PSP_PUBKEY = 0,
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AMD_FW_PSP_BOOTLOADER = 1,
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AMD_FW_PSP_SMU_FIRMWARE = 8,
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2017-03-17 23:30:51 +01:00
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AMD_FW_PSP_SMU_FN_FIRMWARE = FANLESS_FW + AMD_FW_PSP_SMU_FIRMWARE,
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2015-11-17 15:57:39 +01:00
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AMD_FW_PSP_RECOVERY = 3,
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AMD_FW_PSP_RTM_PUBKEY = 5,
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AMD_FW_PSP_SECURED_OS = 2,
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AMD_FW_PSP_NVRAM = 4,
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AMD_FW_PSP_SECURED_DEBUG = 9,
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AMD_FW_PSP_TRUSTLETS = 12,
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AMD_FW_PSP_TRUSTLETKEY = 13,
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AMD_FW_PSP_SMU_FIRMWARE2 = 18,
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2017-03-17 23:30:51 +01:00
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AMD_FW_PSP_SMU_FN_FIRMWARE2 = FANLESS_FW + AMD_FW_PSP_SMU_FIRMWARE2,
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2015-11-17 15:57:39 +01:00
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AMD_PSP_FUSE_CHAIN = 11,
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AMD_FW_PSP_SMUSCS = 95,
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AMD_FW_IMC,
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AMD_FW_GEC,
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AMD_FW_XHCI,
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2016-03-02 07:47:27 +01:00
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AMD_FW_INVALID,
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2015-11-17 15:57:39 +01:00
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} amd_fw_type;
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typedef struct _amd_fw_entry {
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amd_fw_type type;
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char *filename;
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} amd_fw_entry;
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2016-11-08 18:44:18 +01:00
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static amd_fw_entry amd_psp_fw_table[] = {
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2015-11-17 15:57:39 +01:00
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{ .type = AMD_FW_PSP_PUBKEY },
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{ .type = AMD_FW_PSP_BOOTLOADER },
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{ .type = AMD_FW_PSP_SMU_FIRMWARE },
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{ .type = AMD_FW_PSP_RECOVERY },
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{ .type = AMD_FW_PSP_RTM_PUBKEY },
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{ .type = AMD_FW_PSP_SECURED_OS },
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{ .type = AMD_FW_PSP_NVRAM },
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{ .type = AMD_FW_PSP_SECURED_DEBUG },
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{ .type = AMD_FW_PSP_TRUSTLETS },
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{ .type = AMD_FW_PSP_TRUSTLETKEY },
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2017-03-17 23:30:51 +01:00
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{ .type = AMD_FW_PSP_SMU_FN_FIRMWARE },
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{ .type = AMD_FW_PSP_SMU_FN_FIRMWARE2 },
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2017-03-31 09:12:24 +02:00
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{ .type = AMD_FW_PSP_SMU_FIRMWARE2 },
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2015-11-17 15:57:39 +01:00
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{ .type = AMD_FW_PSP_SMUSCS },
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{ .type = AMD_PSP_FUSE_CHAIN },
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2016-03-02 07:47:27 +01:00
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{ .type = AMD_FW_INVALID },
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2015-11-17 15:57:39 +01:00
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};
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2016-11-08 18:44:18 +01:00
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static amd_fw_entry amd_fw_table[] = {
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2015-11-17 15:57:39 +01:00
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{ .type = AMD_FW_XHCI },
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{ .type = AMD_FW_IMC },
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{ .type = AMD_FW_GEC },
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2016-03-02 07:47:27 +01:00
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{ .type = AMD_FW_INVALID },
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2015-11-17 15:57:39 +01:00
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};
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2019-02-24 00:42:46 +01:00
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typedef struct _embedded_firmware {
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uint32_t signature; /* 0x55aa55aa */
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uint32_t imc_entry;
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uint32_t gec_entry;
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uint32_t xhci_entry;
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uint32_t psp_entry;
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uint32_t comboable;
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} __attribute__((packed, aligned(16))) embedded_firmware;
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typedef struct _psp_directory_header {
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uint32_t cookie;
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uint32_t checksum;
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uint32_t num_entries;
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uint32_t reserved;
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} __attribute__((packed, aligned(16))) psp_directory_header;
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typedef struct _psp_directory_entry {
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uint32_t type; /* b[15:8] may be a modifier, e.g. subprogram */
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uint32_t size;
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uint64_t addr; /* or a value in some cases */
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} __attribute__((packed)) psp_directory_entry;
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typedef struct _psp_directory_table {
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psp_directory_header header;
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psp_directory_entry entries[];
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} __attribute__((packed)) psp_directory_table;
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2019-03-05 00:53:15 +01:00
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#define MAX_PSP_ENTRIES 0x1f
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2019-02-24 00:42:46 +01:00
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typedef struct _psp_combo_header {
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uint32_t cookie;
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uint32_t checksum;
|
|
|
|
uint32_t num_entries;
|
|
|
|
uint32_t lookup;
|
|
|
|
uint64_t reserved[2];
|
|
|
|
} __attribute__((packed, aligned(16))) psp_combo_header;
|
|
|
|
|
|
|
|
typedef struct _psp_combo_entry {
|
|
|
|
uint32_t id_sel;
|
|
|
|
uint32_t id;
|
|
|
|
uint64_t lvl2_addr;
|
|
|
|
} __attribute__((packed)) psp_combo_entry;
|
|
|
|
|
|
|
|
typedef struct _psp_combo_directory {
|
|
|
|
psp_combo_header header;
|
|
|
|
psp_combo_entry entries[];
|
|
|
|
} __attribute__((packed)) psp_combo_directory;
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
#define MAX_COMBO_ENTRIES 1
|
|
|
|
|
|
|
|
typedef struct _context {
|
|
|
|
char *rom; /* target buffer, size of flash device */
|
|
|
|
uint32_t rom_size; /* size of flash device */
|
|
|
|
uint32_t current; /* pointer within flash & proxy buffer */
|
|
|
|
} context;
|
|
|
|
|
|
|
|
#define RUN_BASE(ctx) (0xFFFFFFFF - (ctx).rom_size + 1)
|
|
|
|
#define RUN_OFFSET(ctx, offset) (RUN_BASE(ctx) + (offset))
|
|
|
|
#define RUN_CURRENT(ctx) RUN_OFFSET((ctx), (ctx).current)
|
|
|
|
#define BUFF_OFFSET(ctx, offset) ((void *)((ctx).rom + (offset)))
|
|
|
|
#define BUFF_CURRENT(ctx) BUFF_OFFSET((ctx), (ctx).current)
|
|
|
|
#define BUFF_TO_RUN(ctx, ptr) RUN_OFFSET((ctx), ((char *)(ptr) - (ctx).rom))
|
|
|
|
#define BUFF_ROOM(ctx) ((ctx).rom_size - (ctx).current)
|
|
|
|
|
|
|
|
static void *new_psp_dir(context *ctx)
|
|
|
|
{
|
|
|
|
void *ptr;
|
|
|
|
|
|
|
|
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT);
|
|
|
|
ptr = BUFF_CURRENT(*ctx);
|
|
|
|
ctx->current += sizeof(psp_directory_header)
|
|
|
|
+ MAX_PSP_ENTRIES * sizeof(psp_directory_entry);
|
|
|
|
return ptr;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *new_combo_dir(context *ctx)
|
|
|
|
{
|
|
|
|
void *ptr;
|
|
|
|
|
|
|
|
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT);
|
|
|
|
ptr = BUFF_CURRENT(*ctx);
|
|
|
|
ctx->current += sizeof(psp_combo_header)
|
|
|
|
+ MAX_COMBO_ENTRIES * sizeof(psp_combo_entry);
|
|
|
|
return ptr;
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:52:07 +01:00
|
|
|
static void fill_dir_header(void *directory, uint32_t count, uint32_t cookie)
|
2015-11-17 15:57:39 +01:00
|
|
|
{
|
2019-03-05 00:52:07 +01:00
|
|
|
if (cookie == PSP2_COOKIE) {
|
|
|
|
/* caller is responsible for lookup mode */
|
|
|
|
psp_combo_directory *cdir = directory;
|
|
|
|
cdir->header.cookie = cookie;
|
|
|
|
cdir->header.num_entries = count;
|
|
|
|
cdir->header.reserved[0] = 0;
|
|
|
|
cdir->header.reserved[1] = 0;
|
|
|
|
/* checksum everything that comes after the Checksum field */
|
|
|
|
cdir->header.checksum = fletcher32(&cdir->header.num_entries,
|
|
|
|
count * sizeof(psp_combo_entry)
|
|
|
|
+ sizeof(cdir->header.num_entries)
|
|
|
|
+ sizeof(cdir->header.lookup)
|
|
|
|
+ 2 * sizeof(cdir->header.reserved[0]));
|
|
|
|
} else {
|
|
|
|
psp_directory_table *dir = directory;
|
|
|
|
dir->header.cookie = cookie;
|
|
|
|
dir->header.num_entries = count;
|
|
|
|
dir->header.reserved = 0;
|
|
|
|
/* checksum everything that comes after the Checksum field */
|
|
|
|
dir->header.checksum = fletcher32(&dir->header.num_entries,
|
2019-02-24 15:18:44 +01:00
|
|
|
count * sizeof(psp_directory_entry)
|
2019-03-05 00:52:07 +01:00
|
|
|
+ sizeof(dir->header.num_entries)
|
|
|
|
+ sizeof(dir->header.reserved));
|
|
|
|
}
|
2015-11-17 15:57:39 +01:00
|
|
|
}
|
|
|
|
|
2019-02-28 02:40:49 +01:00
|
|
|
static ssize_t copy_blob(void *dest, const char *src_file, size_t room)
|
|
|
|
{
|
|
|
|
int fd;
|
|
|
|
struct stat fd_stat;
|
|
|
|
ssize_t bytes;
|
|
|
|
|
|
|
|
fd = open(src_file, O_RDONLY);
|
|
|
|
if (fd < 0) {
|
|
|
|
printf("Error: %s\n", strerror(errno));
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fstat(fd, &fd_stat)) {
|
|
|
|
printf("fstat error: %s\n", strerror(errno));
|
|
|
|
return -2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fd_stat.st_size > room) {
|
|
|
|
printf("Error: %s will not fit. Exiting.\n", src_file);
|
|
|
|
return -3;
|
|
|
|
}
|
|
|
|
|
|
|
|
bytes = read(fd, dest, (size_t)fd_stat.st_size);
|
|
|
|
close(fd);
|
|
|
|
if (bytes != (ssize_t)fd_stat.st_size) {
|
|
|
|
printf("Error while reading %s\n", src_file);
|
|
|
|
return -4;
|
|
|
|
}
|
|
|
|
|
|
|
|
return bytes;
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
static void integrate_firmwares(context *ctx,
|
2019-02-24 00:42:46 +01:00
|
|
|
embedded_firmware *romsig,
|
2019-03-05 00:53:15 +01:00
|
|
|
amd_fw_entry *fw_table)
|
2015-11-17 15:57:39 +01:00
|
|
|
{
|
2018-01-17 18:23:19 +01:00
|
|
|
ssize_t bytes;
|
2016-03-02 07:47:27 +01:00
|
|
|
int i;
|
2019-03-05 00:53:15 +01:00
|
|
|
|
|
|
|
ctx->current += sizeof(embedded_firmware);
|
|
|
|
ctx->current = ALIGN(ctx->current, BLOB_ALIGNMENT);
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2016-11-08 19:34:02 +01:00
|
|
|
for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
|
2016-03-02 07:47:27 +01:00
|
|
|
if (fw_table[i].filename != NULL) {
|
|
|
|
switch (fw_table[i].type) {
|
|
|
|
case AMD_FW_IMC:
|
2019-03-05 00:53:15 +01:00
|
|
|
ctx->current = ALIGN(ctx->current, 0x10000U);
|
|
|
|
romsig->imc_entry = RUN_CURRENT(*ctx);
|
2016-03-02 07:47:27 +01:00
|
|
|
break;
|
|
|
|
case AMD_FW_GEC:
|
2019-03-05 00:53:15 +01:00
|
|
|
romsig->gec_entry = RUN_CURRENT(*ctx);
|
2016-03-02 07:47:27 +01:00
|
|
|
break;
|
|
|
|
case AMD_FW_XHCI:
|
2019-03-05 00:53:15 +01:00
|
|
|
romsig->xhci_entry = RUN_CURRENT(*ctx);
|
2016-03-02 07:47:27 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* Error */
|
|
|
|
break;
|
|
|
|
}
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
bytes = copy_blob(BUFF_CURRENT(*ctx),
|
|
|
|
fw_table[i].filename, BUFF_ROOM(*ctx));
|
2019-02-28 02:40:49 +01:00
|
|
|
if (bytes <= 0) {
|
2019-03-05 00:53:15 +01:00
|
|
|
free(ctx->rom);
|
2018-01-17 18:23:19 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
ctx->current = ALIGN(ctx->current + bytes,
|
|
|
|
BLOB_ALIGNMENT);
|
2016-03-02 07:47:27 +01:00
|
|
|
}
|
2015-11-17 15:57:39 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
static void integrate_psp_firmwares(context *ctx,
|
2019-02-24 00:42:46 +01:00
|
|
|
psp_directory_table *pspdir,
|
2019-03-05 00:53:15 +01:00
|
|
|
amd_fw_entry *fw_table)
|
2015-11-17 15:57:39 +01:00
|
|
|
{
|
2018-01-17 18:23:19 +01:00
|
|
|
ssize_t bytes;
|
2019-02-24 00:41:35 +01:00
|
|
|
unsigned int i, count;
|
2019-03-05 00:53:15 +01:00
|
|
|
|
|
|
|
ctx->current = ALIGN(ctx->current, BLOB_ALIGNMENT);
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2019-02-24 00:41:35 +01:00
|
|
|
for (i = 0, count = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
|
2016-03-02 07:47:27 +01:00
|
|
|
if (fw_table[i].type == AMD_PSP_FUSE_CHAIN) {
|
2019-02-24 00:42:46 +01:00
|
|
|
pspdir->entries[count].type = fw_table[i].type;
|
|
|
|
pspdir->entries[count].size = 0xFFFFFFFF;
|
|
|
|
pspdir->entries[count].addr = 1;
|
2019-02-24 00:41:35 +01:00
|
|
|
count++;
|
2016-03-02 07:47:27 +01:00
|
|
|
} else if (fw_table[i].filename != NULL) {
|
2019-03-05 00:53:15 +01:00
|
|
|
bytes = copy_blob(BUFF_CURRENT(*ctx),
|
|
|
|
fw_table[i].filename, BUFF_ROOM(*ctx));
|
2019-02-28 02:40:49 +01:00
|
|
|
if (bytes <= 0) {
|
2019-03-05 00:53:15 +01:00
|
|
|
free(ctx->rom);
|
2016-11-08 17:55:01 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2019-02-28 02:40:49 +01:00
|
|
|
pspdir->entries[count].type = fw_table[i].type;
|
|
|
|
pspdir->entries[count].size = (uint32_t)bytes;
|
2019-03-05 00:53:15 +01:00
|
|
|
pspdir->entries[count].addr = RUN_CURRENT(*ctx);
|
2016-03-02 07:47:27 +01:00
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
ctx->current = ALIGN(ctx->current + bytes,
|
|
|
|
BLOB_ALIGNMENT);
|
2019-02-24 00:41:35 +01:00
|
|
|
count++;
|
2016-03-02 07:47:27 +01:00
|
|
|
} else {
|
|
|
|
/* This APU doesn't have this firmware. */
|
|
|
|
}
|
2015-11-17 15:57:39 +01:00
|
|
|
}
|
2019-03-05 00:53:15 +01:00
|
|
|
|
|
|
|
if (count > MAX_PSP_ENTRIES) {
|
|
|
|
printf("Error: PSP entries exceed max allowed items\n");
|
|
|
|
free(ctx->rom);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:52:07 +01:00
|
|
|
fill_dir_header(pspdir, count, PSP_COOKIE);
|
2015-11-17 15:57:39 +01:00
|
|
|
}
|
|
|
|
|
2019-02-28 19:43:40 +01:00
|
|
|
static const char *optstring = "x:i:g:Ap:b:s:r:k:c:n:d:t:u:w:e:j:m:o:f:l:h";
|
2016-09-21 05:05:45 +02:00
|
|
|
|
2015-11-17 15:57:39 +01:00
|
|
|
static struct option long_options[] = {
|
2017-03-17 23:30:51 +01:00
|
|
|
{"xhci", required_argument, 0, 'x' },
|
|
|
|
{"imc", required_argument, 0, 'i' },
|
|
|
|
{"gec", required_argument, 0, 'g' },
|
2015-11-17 15:57:39 +01:00
|
|
|
/* PSP */
|
2019-02-28 19:43:40 +01:00
|
|
|
{"combo-capable", no_argument, 0, 'A' },
|
2017-03-17 23:30:51 +01:00
|
|
|
{"pubkey", required_argument, 0, 'p' },
|
|
|
|
{"bootloader", required_argument, 0, 'b' },
|
|
|
|
{"smufirmware", required_argument, 0, 's' },
|
2019-02-28 19:43:40 +01:00
|
|
|
{"smufnfirmware", required_argument, 0, 'j' },
|
2017-03-17 23:30:51 +01:00
|
|
|
{"recovery", required_argument, 0, 'r' },
|
|
|
|
{"rtmpubkey", required_argument, 0, 'k' },
|
|
|
|
{"secureos", required_argument, 0, 'c' },
|
|
|
|
{"nvram", required_argument, 0, 'n' },
|
|
|
|
{"securedebug", required_argument, 0, 'd' },
|
|
|
|
{"trustlets", required_argument, 0, 't' },
|
|
|
|
{"trustletkey", required_argument, 0, 'u' },
|
|
|
|
{"smufirmware2", required_argument, 0, 'w' },
|
2019-02-28 19:43:40 +01:00
|
|
|
{"smufnfirmware2", required_argument, 0, 'e' },
|
2017-03-17 23:30:51 +01:00
|
|
|
{"smuscs", required_argument, 0, 'm' },
|
|
|
|
{"output", required_argument, 0, 'o' },
|
|
|
|
{"flashsize", required_argument, 0, 'f' },
|
2017-10-03 22:16:04 +02:00
|
|
|
{"location", required_argument, 0, 'l' },
|
2017-03-17 23:30:51 +01:00
|
|
|
{"help", no_argument, 0, 'h' },
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2017-03-17 23:30:51 +01:00
|
|
|
{NULL, 0, 0, 0 }
|
2015-11-17 15:57:39 +01:00
|
|
|
};
|
|
|
|
|
2019-03-05 00:50:37 +01:00
|
|
|
static void register_fw_filename(amd_fw_type type, char filename[])
|
2015-11-17 15:57:39 +01:00
|
|
|
{
|
2016-11-08 18:44:18 +01:00
|
|
|
unsigned int i;
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2016-11-08 19:34:02 +01:00
|
|
|
for (i = 0; i < sizeof(amd_fw_table) / sizeof(amd_fw_entry); i++) {
|
2015-11-17 15:57:39 +01:00
|
|
|
if (amd_fw_table[i].type == type) {
|
|
|
|
amd_fw_table[i].filename = filename;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:50:37 +01:00
|
|
|
for (i = 0; i < sizeof(amd_psp_fw_table) / sizeof(amd_fw_entry); i++) {
|
|
|
|
if (amd_psp_fw_table[i].type == type) {
|
|
|
|
amd_psp_fw_table[i].filename = filename;
|
|
|
|
return;
|
2015-11-17 15:57:39 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int main(int argc, char **argv)
|
|
|
|
{
|
2019-03-05 00:50:37 +01:00
|
|
|
int c;
|
2016-11-08 19:22:12 +01:00
|
|
|
int retval = 0;
|
2016-11-08 17:55:01 +01:00
|
|
|
char *tmp;
|
2016-11-08 18:44:18 +01:00
|
|
|
char *rom = NULL;
|
2019-02-24 00:42:46 +01:00
|
|
|
embedded_firmware *amd_romsig;
|
|
|
|
psp_directory_table *pspdir;
|
2019-02-28 19:43:40 +01:00
|
|
|
int comboable = 0;
|
2015-11-17 15:57:39 +01:00
|
|
|
int targetfd;
|
2016-11-08 18:44:18 +01:00
|
|
|
char *output = NULL;
|
2019-03-05 00:53:15 +01:00
|
|
|
context ctx = {
|
|
|
|
.rom_size = CONFIG_ROM_SIZE,
|
|
|
|
};
|
2017-10-03 22:16:04 +02:00
|
|
|
uint32_t dir_location = 0;
|
|
|
|
uint32_t romsig_offset;
|
2016-11-08 17:55:01 +01:00
|
|
|
uint32_t rom_base_address;
|
2015-11-17 15:57:39 +01:00
|
|
|
|
|
|
|
while (1) {
|
|
|
|
int optindex = 0;
|
|
|
|
|
|
|
|
c = getopt_long(argc, argv, optstring, long_options, &optindex);
|
|
|
|
|
|
|
|
if (c == -1)
|
|
|
|
break;
|
|
|
|
|
|
|
|
switch (c) {
|
|
|
|
case 'x':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_XHCI, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'i':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_IMC, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'g':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_GEC, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
2019-02-28 19:43:40 +01:00
|
|
|
case 'A':
|
|
|
|
comboable = 1;
|
|
|
|
break;
|
2015-11-17 15:57:39 +01:00
|
|
|
case 'p':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_PUBKEY, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'b':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_BOOTLOADER, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 's':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
2019-02-28 19:43:40 +01:00
|
|
|
case 'j':
|
|
|
|
register_fw_filename(AMD_FW_PSP_SMU_FN_FIRMWARE,
|
2019-03-05 00:50:37 +01:00
|
|
|
optarg);
|
2019-02-28 19:43:40 +01:00
|
|
|
break;
|
2015-11-17 15:57:39 +01:00
|
|
|
case 'r':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_RECOVERY, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'k':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_RTM_PUBKEY, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'c':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_SECURED_OS, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'n':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_NVRAM, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'd':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_SECURED_DEBUG, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 't':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_TRUSTLETS, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'u':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_TRUSTLETKEY, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'w':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE2, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
2019-02-28 19:43:40 +01:00
|
|
|
case 'e':
|
|
|
|
register_fw_filename(AMD_FW_PSP_SMU_FN_FIRMWARE2,
|
2019-03-05 00:50:37 +01:00
|
|
|
optarg);
|
2019-02-28 19:43:40 +01:00
|
|
|
break;
|
2015-11-17 15:57:39 +01:00
|
|
|
case 'm':
|
2019-03-05 00:50:37 +01:00
|
|
|
register_fw_filename(AMD_FW_PSP_SMUSCS, optarg);
|
2015-11-17 15:57:39 +01:00
|
|
|
break;
|
|
|
|
case 'o':
|
|
|
|
output = optarg;
|
|
|
|
break;
|
2016-11-08 17:55:01 +01:00
|
|
|
case 'f':
|
2019-03-05 00:53:15 +01:00
|
|
|
ctx.rom_size = (uint32_t)strtoul(optarg, &tmp, 16);
|
2016-11-08 17:55:01 +01:00
|
|
|
if (*tmp != '\0') {
|
|
|
|
printf("Error: ROM size specified"
|
|
|
|
" incorrectly (%s)\n\n", optarg);
|
2016-11-08 19:22:12 +01:00
|
|
|
retval = 1;
|
2016-11-08 17:55:01 +01:00
|
|
|
}
|
|
|
|
break;
|
2017-10-03 22:16:04 +02:00
|
|
|
case 'l':
|
|
|
|
dir_location = (uint32_t)strtoul(optarg, &tmp, 16);
|
|
|
|
if (*tmp != '\0') {
|
|
|
|
printf("Error: Directory Location specified"
|
|
|
|
" incorrectly (%s)\n\n", optarg);
|
|
|
|
retval = 1;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-11-17 15:57:39 +01:00
|
|
|
case 'h':
|
|
|
|
usage();
|
2016-11-08 19:22:12 +01:00
|
|
|
return 0;
|
2015-11-17 15:57:39 +01:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-11-08 18:44:18 +01:00
|
|
|
if (!output) {
|
2016-11-08 19:22:12 +01:00
|
|
|
printf("Error: Output value is not specified.\n\n");
|
|
|
|
retval = 1;
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
if (ctx.rom_size % 1024 != 0) {
|
2016-11-08 17:55:01 +01:00
|
|
|
printf("Error: ROM Size (%d bytes) should be a multiple of"
|
2019-03-05 00:53:15 +01:00
|
|
|
" 1024 bytes.\n\n", ctx.rom_size);
|
2016-11-08 19:22:12 +01:00
|
|
|
retval = 1;
|
2016-11-08 17:55:01 +01:00
|
|
|
}
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
if (ctx.rom_size < MIN_ROM_KB * 1024) {
|
2016-11-08 19:22:12 +01:00
|
|
|
printf("Error: ROM Size (%dKB) must be at least %dKB.\n\n",
|
2019-03-05 00:53:15 +01:00
|
|
|
ctx.rom_size / 1024, MIN_ROM_KB);
|
2016-11-08 19:22:12 +01:00
|
|
|
retval = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (retval) {
|
|
|
|
usage();
|
|
|
|
return retval;
|
2016-11-08 17:55:01 +01:00
|
|
|
}
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
printf(" AMDFWTOOL Using ROM size of %dKB\n", ctx.rom_size / 1024);
|
2016-11-08 17:55:01 +01:00
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
rom_base_address = 0xFFFFFFFF - ctx.rom_size + 1;
|
2017-10-03 22:16:04 +02:00
|
|
|
if (dir_location && (dir_location < rom_base_address)) {
|
|
|
|
printf("Error: Directory location outside of ROM.\n\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (dir_location) {
|
|
|
|
case 0: /* Fall through */
|
|
|
|
case 0xFFFA0000: /* Fall through */
|
|
|
|
case 0xFFF20000: /* Fall through */
|
|
|
|
case 0xFFE20000: /* Fall through */
|
|
|
|
case 0xFFC20000: /* Fall through */
|
|
|
|
case 0xFF820000: /* Fall through */
|
|
|
|
case 0xFF020000: /* Fall through */
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("Error: Invalid Directory location.\n");
|
|
|
|
printf(" Valid locations are 0xFFFA0000, 0xFFF20000,\n");
|
|
|
|
printf(" 0xFFE20000, 0xFFC20000, 0xFF820000, 0xFF020000\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
ctx.rom = malloc(ctx.rom_size);
|
|
|
|
if (!ctx.rom) {
|
|
|
|
printf("Error: Failed to allocate memory\n");
|
2016-11-08 19:22:12 +01:00
|
|
|
return 1;
|
2019-03-05 00:53:15 +01:00
|
|
|
}
|
|
|
|
memset(ctx.rom, 0xFF, ctx.rom_size);
|
2016-11-08 17:55:01 +01:00
|
|
|
|
2017-10-03 22:16:04 +02:00
|
|
|
if (dir_location)
|
2019-03-05 00:53:15 +01:00
|
|
|
romsig_offset = ctx.current = dir_location - rom_base_address;
|
2017-10-03 22:16:04 +02:00
|
|
|
else
|
2019-03-05 00:53:15 +01:00
|
|
|
romsig_offset = ctx.current = AMD_ROMSIG_OFFSET;
|
|
|
|
printf(" AMDFWTOOL Using firmware directory location of 0x%08x\n",
|
|
|
|
RUN_CURRENT(ctx));
|
2017-10-03 22:16:04 +02:00
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
amd_romsig = BUFF_OFFSET(ctx, romsig_offset);
|
2019-02-24 00:42:46 +01:00
|
|
|
amd_romsig->signature = EMBEDDED_FW_SIGNATURE;
|
|
|
|
amd_romsig->imc_entry = 0;
|
|
|
|
amd_romsig->gec_entry = 0;
|
|
|
|
amd_romsig->xhci_entry = 0;
|
2016-11-08 17:55:01 +01:00
|
|
|
|
2019-03-05 00:53:15 +01:00
|
|
|
integrate_firmwares(&ctx, amd_romsig, amd_fw_table);
|
|
|
|
|
|
|
|
ctx.current = ALIGN(ctx.current, 0x10000U); /* todo: is necessary? */
|
|
|
|
|
|
|
|
pspdir = new_psp_dir(&ctx);
|
|
|
|
integrate_psp_firmwares(&ctx, pspdir, amd_psp_fw_table);
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2019-03-05 00:50:37 +01:00
|
|
|
if (comboable)
|
2019-03-05 00:53:15 +01:00
|
|
|
amd_romsig->comboable = BUFF_TO_RUN(ctx, pspdir);
|
2019-02-28 19:43:40 +01:00
|
|
|
else
|
2019-03-05 00:53:15 +01:00
|
|
|
amd_romsig->psp_entry = BUFF_TO_RUN(ctx, pspdir);
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2016-03-02 07:47:27 +01:00
|
|
|
#if PSP_COMBO
|
2019-03-05 00:53:15 +01:00
|
|
|
psp_combo_directory *combo_dir = new_combo_dir(&ctx);
|
|
|
|
amd_romsig->comboable = BUFF_TO_RUN(ctx, combo_dir);
|
2019-03-05 00:50:37 +01:00
|
|
|
/* 0 -Compare PSP ID, 1 -Compare chip family ID */
|
|
|
|
combo_dir->entries[0].id_sel = 0;
|
|
|
|
/* TODO: PSP ID. Documentation is needed. */
|
|
|
|
combo_dir->entries[0].id = 0x10220B00;
|
2019-03-05 00:53:15 +01:00
|
|
|
combo_dir->entries[0].lvl2_addr = BUFF_TO_RUN(ctx, pspdir);
|
2019-03-05 00:50:37 +01:00
|
|
|
|
|
|
|
combo_dir->header.lookup = 1;
|
2019-03-05 00:52:07 +01:00
|
|
|
fill_dir_header(combo_dir, 1, PSP2_COOKIE);
|
2016-03-02 07:47:27 +01:00
|
|
|
#endif
|
2015-11-17 15:57:39 +01:00
|
|
|
|
|
|
|
targetfd = open(output, O_RDWR | O_CREAT | O_TRUNC, 0666);
|
2016-11-08 19:22:12 +01:00
|
|
|
if (targetfd >= 0) {
|
2019-03-05 00:53:15 +01:00
|
|
|
write(targetfd, amd_romsig, ctx.current - romsig_offset);
|
2016-11-08 19:22:12 +01:00
|
|
|
close(targetfd);
|
|
|
|
} else {
|
|
|
|
printf("Error: could not open file: %s\n", output);
|
|
|
|
retval = 1;
|
|
|
|
}
|
2015-11-17 15:57:39 +01:00
|
|
|
|
2016-11-08 19:22:12 +01:00
|
|
|
free(rom);
|
|
|
|
return retval;
|
2015-11-17 15:57:39 +01:00
|
|
|
}
|