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big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
Remove address from GPLv2 headers As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-03-26 15:17:45 +01:00
## Foundation, Inc.
big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
##
# Add a handler for BCT config files
$(call add-special-class,bct-cfg)
bct-cfg-handler= $(eval $(obj)/generated/bct.cfg: $(1)$(2))
$(obj)/generated/bct.cfg:
@printf " CAT $(subst $(obj)/,,$(@))\n"
cat $^ > $@
subdirs-y += bct
bootblock-y += bootblock.c
bootblock-y += pmic.c
nyan*: I2C: Implement bus clear when 'ARB_LOST' error occurs This is a fix for the 'Lost arb' we're seeing on Nyan* during reboot stress testing. It occurs when we are slamming the default PMIC registers with pmic_write_reg(). Currently, I've only captured this a few times, and the bus clear seemed to work, as the PMIC writes continued (where they'd hang the system before bus clear) for a couple of regs, then it hangs hard, no messages, no 2nd lost arb, etc. So I've added code to the PMIC write function that will reset the SoC if any I2C error occurs. That seems to recover OK, i.e. on the next reboot the PMIC writes all go thru, boot is OK, kernel loads, etc. BUG=chrome-os-partner:28323 BRANCH=nyan TEST=Tested on nyan. Built for nyan and nyan_big. Original-Change-Id: I1ac5e3023ae22c015105b7f0fb7849663b4aa982 Original-Signed-off-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197732 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> (cherry picked from commit f445127e2d9e223a5ef9117008a7ac7631a7980c) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I584d55b99d65f1e278961db6bdde1845cb01f3bc Reviewed-on: http://review.coreboot.org/7897 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-04-30 23:51:38 +02:00
bootblock-y += reset.c
big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
nyan*: Detect watchdog resets and reset the whole machine. When a watchdog reset happens, the SOC will reset but other parts of the system might not. That puts the machine in a funny state and may prevent it from booting properly. BUG=chrome-os-partner:28559 TEST=Built for nyan, nyan_big and nyan_blaze. Booted normally, through EC reset, software reset ("reboot" command from the terminal), and through watch dog reset. Verified that the new code only triggered during the watchdog reset and that the system rebooted and was able to boot without going into recovery mode unnecessarily. BRANCH=nyan Change-Id: Id92411c928344547fcd97e45063e4aff52d2e9e8 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/198582 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit b298be41c0959c58aeb8be5bf15141549da2504c) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/7900 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-05-07 00:44:14 +02:00
romstage-y += reset.c
big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
romstage-y += romstage.c
tegra/nyan*: sdram updates nyan_big: Add 204MHz BCT for bringup, use 1.2V for VDD_CPU Reviewed-on: https://chromium-review.googlesource.com/183939 (cherry picked from commit a6df76afb5342b805baca749abb8265e15748dc1) nyan_big: Add initial 792MHz BCT Reviewed-on: https://chromium-review.googlesource.com/183975 (cherry picked from commit 61d0122fdce6dc9479666bb0a5bc079c6389f78a) nyan_big: use RAM_CODE[3:2] for ram code Reviewed-on: https://chromium-review.googlesource.com/184076 (cherry picked from commit 35e5c5e473f871cdc897473a31586afbececd716) tegra124: support tri-state Board Id Reviewed-on: https://chromium-review.googlesource.com/183855 (cherry picked from commit 1a9d1bd73aa2cd0c36203b247976ad0d00a360e4) nyan*: Fix SPI pinmux configuration Reviewed-on: https://chromium-review.googlesource.com/184281 (cherry picked from commit ac4106b673c285af66d72392bd4a8522aba98489) nyan_big: Add 4GB 204/792MHz BCTs Reviewed-on: https://chromium-review.googlesource.com/184159 (cherry picked from commit 5ff002d09f8db0543b58962f6c0d24627fb0937e) tegra124: Add function for obtaining DRAM size via MC regs Reviewed-on: https://chromium-review.googlesource.com/184535 (cherry picked from commit d4580c46de649903a266a99eb11c9126ba385b48) tegra124/nyan*: Obtain DRAM size dynamically Reviewed-on: https://chromium-review.googlesource.com/184431 (cherry picked from commit a7db71744771decc04cf1966efba70bf4897cfa3) tegra124: Rearrange iRAM layout to allow more space for romstage Reviewed-on: https://chromium-review.googlesource.com/184240 (cherry picked from commit 6bdaabbc068146a4516c724b71d31bb777dabcfc) tegra124: Fix MemoryType field name in SDRAM parameters. Reviewed-on: https://chromium-review.googlesource.com/185113 (cherry picked from commit 9caccd1e86a8c683402fab87d9f3a49b87496e97) nyan_big: Initialize SDRAM without BootROM. Reviewed-on: https://chromium-review.googlesource.com/183624 (cherry picked from commit a1cbc00aa80ec1ea52e833a8e31c8e4b27160e70) tegra124: move FB_SIZE_MB to a more appropriate location Reviewed-on: https://chromium-review.googlesource.com/184930 (cherry picked from commit ddea486fd4410394417c4e59039d46a324918bdc) nyan: Initialize SDRAM without BootROM. Reviewed-on: https://chromium-review.googlesource.com/185114 (cherry picked from commit 1ff51b580b28553919f91b11b443251b048cf26b) tegra124: Save SDRAM parameters to PMC registers for LP0 Reviewed-on: https://chromium-review.googlesource.com/182928 (cherry picked from commit 7476b4bd0ecdc312476cce871d22f57915a0bd86) tegra124: Rewrite SDRAM parameter saving code to be more efficient Reviewed-on: https://chromium-review.googlesource.com/184388 (cherry picked from commit 25084bd0407624e4b2ff82388c32af1198c501a6) nyan: Slightly change the way SDRAM parameter files are set up Reviewed-on: https://chromium-review.googlesource.com/185286 (cherry picked from commit a31887b804f23e031c395113db582cd71f3d1b6d) Squashed 16 commits for SDRAM support on nyan and nyan_big. Change-Id: I07419985376277083d62400dd14fe8273f6d5ca8 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6949 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-01-23 21:37:50 +01:00
romstage-y += sdram_configs.c
big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
romstage-$(CONFIG_CHROMEOS) += chromeos.c
nyans: reduce code duplication in bootblock and romstages this change reduces the code duplication of the bootblock and the romstages for Nyans. BUG=none TEST=Built Nyan, Big, and Blaze. Ran faft on Blaze. BRANCH=none Original-Signed-off-by: dnojiri@chromium.org (Daisuke Nojiri) Original-Change-Id: Ieb9dac3b061a2cf46c63afb2f31eb67ab391ea1a Original-Reviewed-on: https://chromium-review.googlesource.com/214050 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit f3413d39458f03895fe4963a41285f71d81bcf5f) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I912f63b12321aa26a7add302fc8a6c4e607330ef Reviewed-on: http://review.coreboot.org/8880 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-27 20:48:03 +02:00
romstage-y += early_configs.c
big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
Nyans: replace cpu_reset with hard_reset The existing cpu_reset does board-wide reset, thus, should be renamed. BUG=none BRANCH=none TEST=Built firmware for Nyans. Ran faft on Blaze. Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I5dc4fa9bae328001a897a371d4f23632701f1dd9 Original-Reviewed-on: https://chromium-review.googlesource.com/212982 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 29753b9c1dfe7ecd156042d69b74e9fe4244f455) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I98eca40c50637bda01a9029a904bca6880cd081f Reviewed-on: http://review.coreboot.org/9179 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-08-16 02:07:39 +02:00
ramstage-y += reset.c
Include board ID calculations only when necessary For the majority of Chrome OS boards there is no need to include board ID calculation in any stage but ramstage, where the ID should be available for inclusion into the coreboot table. BUG=chrome-os-partner:30489 TEST=build only, no other tests yet Change-Id: I1451d52382bc48cc126d40267e0f61712f4a6d4b Original-Change-Id: Ib9c06698a399d31e79a9b14143343ba2ad46d0fb Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/210117 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> (cherry picked from commit 27dd40e85bfcd0a38f388bad4d79f5fbb77a7566) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/8720 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-07-29 01:08:34 +02:00
ramstage-y += boardid.c
big: Create a nyan_big mainboard which is a copy of nyan. The nyan_big mainboard is very similar to nyan, but will be different in a few ways. For instance, the BCT will be different, and the GPIOs may need to be configured slightly differently. This change also adds prefixes to the kconfig variables in "choice" blocks for both boards since having multiple instances of choice blocks with the same options confuses kconfig even if all of the instances have mutually exclusive dependencies. Change-Id: I290a32e47fc118bd4b86d543df617ad324325dbc Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/183532 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1a453fe1aa68b3d12936dd48cc6c94b54f81579) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6927 Tested-by: build bot (Jenkins)
2014-01-18 07:11:35 +01:00
ramstage-y += mainboard.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
New mechanism to define SRAM/memory map with automatic bounds checking This patch creates a new mechanism to define the static memory layout (primarily in SRAM) for a given board, superseding the brittle mass of Kconfigs that we were using before. The core part is a memlayout.ld file in the mainboard directory (although boards are expected to just include the SoC default in most cases), which is the primary linker script for all stages (though not rmodules for now). It uses preprocessor macros from <memlayout.h> to form a different valid linker script for all stages while looking like a declarative, boilerplate-free map of memory addresses to the programmer. Linker asserts will automatically guarantee that the defined regions cannot overlap. Stages are defined with a maximum size that will be enforced by the linker. The file serves to both define and document the memory layout, so that the documentation cannot go missing or out of date. The mechanism is implemented for all boards in the ARM, ARM64 and MIPS architectures, and should be extended onto all systems using SRAM in the future. The CAR/XIP environment on x86 has very different requirements and the layout is generally not as static, so it will stay like it is and be unaffected by this patch (save for aligning some symbol names for consistency and sharing the new common ramstage linker script include). BUG=None TEST=Booted normally and in recovery mode, checked suspend/resume and the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies with ToT and looked for red flags. Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614 Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/213370 Reviewed-on: http://review.coreboot.org/9283 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-08-21 00:29:56 +02:00
bootblock-y += memlayout.ld
romstage-y += memlayout.ld
ramstage-y += memlayout.ld
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