2010-09-27 19:53:17 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2002 Eric Biederman <ebiederm@xmission.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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2004-10-14 21:29:29 +02:00
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/*
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* Put the processor back into a reset state
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2010-09-27 19:53:17 +02:00
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* with respect to the XMM registers.
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2004-10-14 21:29:29 +02:00
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*/
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xorps %xmm0, %xmm0
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xorps %xmm1, %xmm1
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xorps %xmm2, %xmm2
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xorps %xmm3, %xmm3
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xorps %xmm4, %xmm4
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xorps %xmm5, %xmm5
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xorps %xmm6, %xmm6
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xorps %xmm7, %xmm7
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2010-09-27 19:53:17 +02:00
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/*
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* Disable SSE instructions.
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*
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* Clear CR4[9] (OSFXSR) and CR4[10] (OSXMMEXCPT) so that the
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* processor can no longer execute SSE instructions, and unmasked
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* SIMD floating point exceptions will generate an invalid opcode
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* exception (#UD).
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*/
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2004-10-14 21:29:29 +02:00
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movl %cr4, %eax
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2010-09-27 19:53:17 +02:00
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andl $~(3 << 9), %eax
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2004-10-14 21:29:29 +02:00
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movl %eax, %cr4
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2010-09-27 19:53:17 +02:00
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