2020-04-05 15:47:17 +02:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
2015-05-13 03:19:47 +02:00
|
|
|
|
2020-09-22 00:44:27 +02:00
|
|
|
#include <cf9_reset.h>
|
|
|
|
#include <intelblocks/pmclib.h>
|
2018-10-01 19:17:11 +02:00
|
|
|
#include <soc/intel/common/reset.h>
|
2020-09-22 00:44:27 +02:00
|
|
|
#include <soc/me.h>
|
|
|
|
#include <soc/pm.h>
|
|
|
|
|
|
|
|
static void do_force_global_reset(void)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* BIOS should ensure it does a global reset
|
|
|
|
* to reset both host and Intel ME by setting
|
|
|
|
* PCH PMC [B0:D31:F2 register offset 0xAC bit 20]
|
|
|
|
*/
|
|
|
|
pmc_global_reset_enable(true);
|
|
|
|
|
|
|
|
/* Now BIOS can write 0x06 or 0x0E to 0xCF9 port
|
|
|
|
* to global reset platform */
|
|
|
|
do_full_reset();
|
|
|
|
}
|
|
|
|
|
|
|
|
void do_global_reset(void)
|
|
|
|
{
|
|
|
|
if (!send_global_reset()) {
|
|
|
|
/* If ME unable to reset platform then
|
|
|
|
* force global reset using PMC CF9GR register*/
|
|
|
|
do_force_global_reset();
|
|
|
|
}
|
|
|
|
}
|