coreboot-kgpe-d16/src/include/device/resource.h

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#ifndef DEVICE_RESOURCE_H
#define DEVICE_RESOURCE_H
#include <stdint.h>
Make the device tree available in the rom stage We thought about two ways to do this change. The way we decided to try was to 1. drop all ops from devices in romstage 2. constify all devices in romstage (make them read-only) so we can compile static.c into romstage 3. the device tree "devices" can be used to read configuration from the device tree (and nothing else, really) 4. the device tree devices are accessed through struct device * in romstage only. device_t stays the typedef to int in romstage 5. Use the same static.c file in ramstage and romstage We declare structs as follows: ROMSTAGE_CONST struct bus dev_root_links[]; ROMSTAGE_CONST is const in romstage and empty in ramstage; This forces all of the device tree into the text area. So a struct looks like this: static ROMSTAGE_CONST struct device _dev21 = { #ifndef __PRE_RAM__ .ops = 0, #endif .bus = &_dev7_links[0], .path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1c,3)}}}, .enabled = 0, .on_mainboard = 1, .subsystem_vendor = 0x1ae0, .subsystem_device = 0xc000, .link_list = NULL, .sibling = &_dev22, #ifndef __PRE_RAM__ .chip_ops = &southbridge_intel_bd82x6x_ops, #endif .chip_info = &southbridge_intel_bd82x6x_info_10, .next=&_dev22 }; Change-Id: I722454d8d3c40baf7df989f5a6891f6ba7db5727 Signed-off-by: Ronald G. Minnich <rminnich@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1398 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-08-01 01:47:25 +02:00
#include <stddef.h>
#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
#define IORESOURCE_IO 0x00000100 /* Resource type */
#define IORESOURCE_MEM 0x00000200
#define IORESOURCE_IRQ 0x00000400
#define IORESOURCE_DRQ 0x00000800
#define IORESOURCE_TYPE_MASK (IORESOURCE_IO | IORESOURCE_MEM \
| IORESOURCE_IRQ | IORESOURCE_DRQ)
#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */
#define IORESOURCE_READONLY 0x00002000
#define IORESOURCE_CACHEABLE 0x00004000
#define IORESOURCE_RANGELENGTH 0x00008000
#define IORESOURCE_SHADOWABLE 0x00010000
#define IORESOURCE_BUS_HAS_VGA 0x00020000
/* This resource filters all of the unclaimed transactions to the bus below. */
#define IORESOURCE_SUBTRACTIVE 0x00040000
/* The IO resource has a bus below it. */
#define IORESOURCE_BRIDGE 0x00080000
device: Enable resource allocation above 4G boundary with allocator v4 This change adds back CB:39487 which was reverted as part of CB:41412. Now that the resource allocator is split into old(v3) and new(v4), this change adds support for allocating resources above 4G boundary with the new allocator v4. Original commit message: This change adds support for allocating resources above the 4G boundary by making use of memranges for resource windows enabled in the previous CL. It adds a new resource flag IORESOURCE_ABOVE_4G which is used in the following ways: a) Downstream device resources can set this flag to indicate that they would like to have their resource allocation above the 4G boundary. These semantics will have to be enabled in the drivers managing the devices. It can also be extended to be enabled via devicetree. This flag is automatically propagated by the resource allocator from downstream devices to the upstream bridges in pass 1. It is done to ensure that the resource allocator has a global view of downstream requirements during pass 2 at domain level. b) Bridges have a single resource window for each of mem and prefmem resource types. Thus, if any downstream resource of the bridge requests allocation above 4G boundary, all the other downstream resources of the same type under the bridge will be allocated above 4G boundary. c) During pass 2, resource allocator at domain level splits IORESOURCE_MEM into two different memory ranges -- one for the window below 4G and other above 4G. Resource allocation happens separately for each of these windows. d) At the bridge level, there is no extra logic required since the resource will live entirely above or below the 4G boundary. Hence, all downstream devices of any bridge will fall within the window allocated to the bridge resource. To handle this case separately from that of domain, initializing of memranges for a bridge is done differently than the domain. Limitation: Resources of a given type at the bridge or downstream devices cannot live both above and below 4G boundary. Thus, if a bridge has some downstream resources requesting allocation for a given type above 4G boundary and other resources of the same type requesting allocation below 4G boundary, then all these resources of the same type get allocated above 4G boundary. Change-Id: I92a5cf7cd1457f2f713e1ffd8ea31796ce3d0cce Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41466 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-05-16 02:33:52 +02:00
/* This is a request to allocate resource about 4G boundary. */
#define IORESOURCE_ABOVE_4G 0x00100000
/* The resource needs to be reserved in the coreboot table */
#define IORESOURCE_RESERVE 0x10000000
/* The IO resource assignment has been stored in the device */
#define IORESOURCE_STORED 0x20000000
/* An IO resource that has been assigned a value */
#define IORESOURCE_ASSIGNED 0x40000000
/* An IO resource the allocator must not change */
#define IORESOURCE_FIXED 0x80000000
/* PCI specific resource bits (IORESOURCE_BITS) */
#define IORESOURCE_PCI64 (1<<0) /* 64bit long pci resource */
#define IORESOURCE_PCI_BRIDGE (1<<1) /* A bridge pci resource */
typedef u64 resource_t;
struct resource {
resource_t base; /* Base address of the resource */
resource_t size; /* Size of the resource */
resource_t limit; /* Largest valid value base + size -1 */
DEVTREE_CONST struct resource *next; /* Next resource in the list */
unsigned long flags; /* Descriptions of the kind of resource */
unsigned long index; /* Bus specific per device resource id */
unsigned char align; /* Required alignment (log 2) of the resource */
unsigned char gran; /* Granularity (log 2) of the resource */
/* Alignment must be >= the granularity of the resource */
};
/* Macros to generate index values for resources */
#define IOINDEX_SUBTRACTIVE(IDX, LINK) (0x10000000 + ((IDX) << 8) + LINK)
#define IOINDEX_SUBTRACTIVE_LINK(IDX) (IDX & 0xff)
#define IOINDEX(IDX, LINK) (((LINK) << 16) + IDX)
#define IOINDEX_LINK(IDX) ((IDX & 0xf0000) >> 16)
#define IOINDEX_IDX(IDX) (IDX & 0xffff)
/* Generic resource helper functions */
struct device;
struct bus;
extern void compact_resources(struct device *dev);
extern struct resource *probe_resource(const struct device *dev,
unsigned int index);
extern struct resource *new_resource(struct device *dev, unsigned int index);
extern struct resource *find_resource(const struct device *dev,
unsigned int index);
extern resource_t resource_end(struct resource *resource);
extern resource_t resource_max(struct resource *resource);
extern void report_resource_stored(struct device *dev,
struct resource *resource, const char *comment);
typedef void (*resource_search_t)(void *gp, struct device *dev,
struct resource *res);
extern void search_bus_resources(struct bus *bus,
unsigned long type_mask, unsigned long type,
resource_search_t search, void *gp);
extern void search_global_resources(
unsigned long type_mask, unsigned long type,
resource_search_t search, void *gp);
#define RESOURCE_TYPE_MAX 20
extern const char *resource_type(struct resource *resource);
static inline void *res2mmio(struct resource *res, unsigned long offset,
unsigned long mask)
{
return (void *)(uintptr_t)((res->base + offset) & ~mask);
}
device: Move resource allocation into a separate compilation unit This change moves the resource allocator functions out of device.c and into two separate files: 1. resource_allocator_v3.c: This is the old implementation of resource allocator that uses a single window for resource allocation. It is required to support some AMD chipsets that do not provide an accurate map of allocated resources by the time the allocator runs. They work fine with the old allocator since it restricts itself to allocations in a single window at the top of the 4G space. 2. resource_allocator_common.c: This file contains the functions that can be shared by the old and new resource allocator. Entry point into the resource allocation is allocate_resources() which can be implemented by both old and new allocators. This change also adds a Kconfig option RESOURCE_ALLOCATOR_V3 which enables the old resource allocator. This config option is enabled by default currently, but in the following CLs this will be enabled only for the broken boards. Reason for this split: Both the old and new resource allocators need to be retained in the tree until the broken chipsets are fixed. Change-Id: I2f5440cf83c6e9e15a5f22e79cc3c66aa2cec4c0 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41442 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-16 00:43:15 +02:00
/*
* Pick largest resource on the bus using the given mask and type.
* Params:
* bus = Bus from which the resource needs to picked from.
* result_res = If NULL, there was no previous resource picked on this bus, else it points to
* the last picked resource.
* type_mask = Mask to be applied when searching for resource
* type = Expected type for the resource
*
* Returns:
* If resource is found, returns the device and sets result_rest to point to the resource. Else
* returns NULL.
*/
const struct device *largest_resource(struct bus *bus, struct resource **result_res,
unsigned long type_mask, unsigned long type);
/* Compute and allocate resources. This is the main resource allocator entry point. */
void allocate_resources(const struct device *root);
#endif /* DEVICE_RESOURCE_H */