58 lines
1.4 KiB
C
58 lines
1.4 KiB
C
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/chip.h>
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#include "i82801dbm.h"
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void i82801dbm_enable(device_t dev)
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{
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device_t lpc_dev;
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unsigned int index;
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uint16_t reg_old, reg;
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// all 82801dbm device ares in bus 0
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unsigned int devfn;
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devfn = PCI_DEVFN(0x1f, 0); // lpc
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lpc_dev = dev_find_slot(0, devfn); // 0
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if (!lpc_dev ) {
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return;
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}
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#if 0
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if ((lpc_dev->vendor != PCI_VENDOR_ID_INTEL) ||
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(lpc_dev->device != PCI_DEVICE_ID_INTEL_82801ER_1F0)) {
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uint32_t id;
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id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
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if (id != (PCI_VENDOR_ID_INTEL | (PCI_DEVICE_ID_INTEL_82801ER_1F0 << 16))) {
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return;
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}
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}
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#endif
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index = (dev->path.u.pci.devfn & 7);
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if((dev->path.u.pci.devfn & ~0x7)==devfn) { // D=0x1f
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if(index==0){ //1f0
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index = 14;
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}
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} else { // D=0x1d
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index += 8;
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}
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reg_old = pci_read_config16(lpc_dev, FUNC_DIS);
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reg = reg_old;
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reg &= ~(1<<index); // enable it
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if (!dev->enabled) {
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reg |= (1<<index); // disable it
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}
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if (reg != reg_old) {
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pci_write_config16(lpc_dev, FUNC_DIS, reg);
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}
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reg = pci_read_config16(lpc_dev, FUNC_DIS);
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}
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struct chip_control southbridge_intel_i82801dbm_control = {
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.name = "Intel 82801dbm Southbridge",
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.enable_dev = i82801dbm_enable,
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};
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