2015-05-03 13:34:38 +02:00
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2009 coresystems GmbH
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## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config NORTHBRIDGE_INTEL_PINEVIEW
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bool
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if NORTHBRIDGE_INTEL_PINEVIEW
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config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
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def_bool y
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select HAVE_DEBUG_RAM_SETUP
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select LAPIC_MONOTONIC_TIMER
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2016-01-18 08:34:52 +01:00
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select VGA
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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2017-04-21 16:22:44 +02:00
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select RELOCATABLE_RAMSTAGE
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2016-01-18 08:34:52 +01:00
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config MAINBOARD_DO_NATIVE_VGA_INIT
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def_bool y
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select INTEL_EDID
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2015-05-03 13:34:38 +02:00
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/intel/pineview/bootblock.c"
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config VGA_BIOS_ID
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string
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default "8086,a001"
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endif
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