113 lines
4.2 KiB
Markdown
113 lines
4.2 KiB
Markdown
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# ASUS P8Z77-V
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This page describes how to run coreboot on the [ASUS P8Z77-V].
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## Flashing coreboot
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```eval_rst
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+---------------------+----------------+
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| Type | Value |
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+=====================+================+
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| Socketed flash | yes |
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+---------------------+----------------+
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| Model | W25Q64FVA1Q |
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+---------------------+----------------+
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| Size | 8 MiB |
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+---------------------+----------------+
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| Package | DIP-8 |
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+---------------------+----------------+
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| Write protection | yes |
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+---------------------+----------------+
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| Dual BIOS feature | no |
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+---------------------+----------------+
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| Internal flashing | no |
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+---------------------+----------------+
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```
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The flash IC is located between the black and white PCI Express x16 slots (circled):
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### How to flash
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The main SPI flash cannot be written because the vendor firmware disables BIOSWE
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and enables BLE/SMM_BWP flags in BIOS_CNTL for their latest BIOSes. An external
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programmer is required. You must flash standalone, flashing in-circuit doesn't
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work. The flash chip is socketed, so it's easy to remove and reflash.
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## Working
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- PS/2 keyboard with SeaBIOS 1.14.0 and Debian GNU/Linux with kernel 5.10.28
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- Integrated Ethernet NIC
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- S3 Suspend to RAM
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- USB2 on rear and front panel connectors
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- USB3 (Z77's and ASMedia's works)
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- Integrated SATA of Z77
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- Integrated SATA of ASM1061 (works under GNU/Linux but not under SeaBIOS)
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- CPU Temp sensors (tested PSensor on GNU/Linux)
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- TPM on TPM-header (tested tpm-tools with TPM 1.2 Infineon SLB9635TT12)
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- Native raminit
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- Integrated graphics with libgfxinit (VGA/DVI-D/HDMI tested and working)
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- PCIe in PCIe-16x/8x slots (tested using an S3 Matrix GPU)
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- Debug output from serial port
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- Atheros AR9485 half-height mini PCIe WNIC adapted with Wi-Fi Go! Adapter
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- Default PCIe config (PCIEX_16_3 as 1x, PCIe Port 4 to ASM1061 SATA, see below
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for other potential options)
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## Untested
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- EHCI debugging
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- S/PDIF audio
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- PS/2 mouse
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## Not working
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- PCIEX_1_2 (expected under default PCIe config)
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- Other PCIe configs (see below)
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## PCIe config
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On Asus vendor firmware, other than the default config already supported here,
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there remain another two configs: "PCIEX_16_3 as x4, with PCIEX_1_1, PCIEX_1_2
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and onboard ASM1061 disabled" and "PCIEX_16_3 as x1, but PCIe Port 4 to PCIEX_1_2,
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with onboard ASM1061 disabled".
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Configuring PCIEX_16_3 as x4 needs to program 0x3 to the LSB of PCHSTRP9, but
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also needs to configure GPIOs in the Super I/O chip different than the default
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config in this board's override tree.
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Configuring PCIe Port 4 to PCIEX_1_2 needs to configure GPIOs in the Super I/O
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chip differently than the default config.
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I have tried a lot, but sadly I am unable to produce the same result as the vendor
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firmware.
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## Asus Wi-Fi Go!
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Asus Wi-Fi Go! has several versions. P8Z77-V has the earliest version.
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See [Asus Wi-Fi Go! v1].
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## Technology
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```eval_rst
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+------------------+--------------------------------------------------+
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| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` |
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+------------------+--------------------------------------------------+
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| Southbridge | bd82x6x |
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+------------------+--------------------------------------------------+
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| CPU | model_206ax |
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+------------------+--------------------------------------------------+
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| Super I/O | Nuvoton NCT6779D |
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+------------------+--------------------------------------------------+
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| EC | None |
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel Management Engine |
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+------------------+--------------------------------------------------+
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```
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## Extra resources
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- [Flash chip datasheet][W25Q64FVA1Q]
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[ASUS P8Z77-V]: https://www.asus.com/supportonly/p8z77v/helpdesk_knowledge/
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[W25Q64FVA1Q]: https://www.winbond.com/resource-files/w25q64fv%20revs%2007182017.pdf
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[flashrom]: https://flashrom.org/Flashrom
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[Asus Wi-Fi Go! v1]: ./wifigo_v1.md
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