2013-04-18 23:01:45 +02:00
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/*
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2013-05-15 01:57:50 +02:00
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* This file is part of the coreboot project.
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2013-04-18 23:01:45 +02:00
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*
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2013-05-15 01:57:50 +02:00
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* Copyright (C) 2012 Samsung Electronics
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* Copyright 2013 Google Inc.
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2013-04-18 23:01:45 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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2013-05-15 01:57:50 +02:00
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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2013-04-18 23:01:45 +02:00
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*/
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2013-05-15 01:57:50 +02:00
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/* EXYNOS - Thermal Management Unit */
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2013-04-18 23:21:15 +02:00
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2013-05-15 01:57:50 +02:00
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#include <arch/io.h>
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2014-10-20 22:16:29 +02:00
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#include <console/console.h>
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#include <soc/power.h>
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#include <soc/tmu.h>
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2013-04-18 23:01:45 +02:00
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#define TRIMINFO_RELOAD 1
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#define CORE_EN 1
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#define THERM_TRIP_EN (1 << 12)
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#define INTEN_RISE0 1
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#define INTEN_RISE1 (1 << 4)
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#define INTEN_RISE2 (1 << 8)
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#define INTEN_FALL0 (1 << 16)
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#define INTEN_FALL1 (1 << 20)
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#define INTEN_FALL2 (1 << 24)
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#define TRIM_INFO_MASK 0xff
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#define INTCLEAR_RISE0 1
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#define INTCLEAR_RISE1 (1 << 4)
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#define INTCLEAR_RISE2 (1 << 8)
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#define INTCLEAR_FALL0 (1 << 16)
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#define INTCLEAR_FALL1 (1 << 20)
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#define INTCLEAR_FALL2 (1 << 24)
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#define INTCLEARALL (INTCLEAR_RISE0 | INTCLEAR_RISE1 | \
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INTCLEAR_RISE2 | INTCLEAR_FALL0 | \
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INTCLEAR_FALL1 | INTCLEAR_FALL2)
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2013-05-15 01:57:50 +02:00
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struct tmu_info exynos5250_tmu_info = {
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.tmu_base = 0x10060000,
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.tmu_mux = 6,
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.data = {
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.ts = {
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.min_val = 25,
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.max_val = 125,
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.start_warning = 95,
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.start_tripping = 105,
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.hardware_tripping = 110,
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},
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.efuse_min_value = 40,
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.efuse_value = 55,
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.efuse_max_value = 100,
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.slope = 0x10008802,
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},
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.dc_value = 25,
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};
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2013-04-18 23:01:45 +02:00
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/*
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* After reading temperature code from register, compensating
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2013-07-09 00:23:54 +02:00
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* its value and calculating celsius temperature,
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* get current temperature.
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2013-04-18 23:01:45 +02:00
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*
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* @return current temperature of the chip as sensed by TMU
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*/
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2013-04-18 23:21:15 +02:00
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static int get_cur_temp(struct tmu_info *info)
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2013-04-18 23:01:45 +02:00
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{
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int cur_temp;
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struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base;
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/* Temperature code range between min 25 and max 125 */
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arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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cur_temp = read32(®->current_temp) & 0xff;
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2013-04-18 23:01:45 +02:00
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/* Calibrate current temperature */
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if (cur_temp)
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cur_temp = cur_temp - info->te1 + info->dc_value;
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return cur_temp;
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}
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/*
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* Monitors status of the TMU device and exynos temperature
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*
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2013-04-18 23:21:15 +02:00
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* @info TMU info
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* @temp pointer to the current temperature value
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2013-04-18 23:01:45 +02:00
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* @return enum tmu_status_t value, code indicating event to execute
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*/
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2013-04-18 23:21:15 +02:00
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enum tmu_status_t tmu_monitor(struct tmu_info *info, int *temp)
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2013-04-18 23:01:45 +02:00
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{
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2013-04-18 23:21:15 +02:00
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if (info->tmu_state == TMU_STATUS_INIT)
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2013-04-18 23:01:45 +02:00
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return -1;
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int cur_temp;
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2013-04-18 23:21:15 +02:00
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struct tmu_data *data = &info->data;
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2013-04-18 23:01:45 +02:00
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/* Read current temperature of the SOC */
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2013-04-18 23:21:15 +02:00
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cur_temp = get_cur_temp(info);
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2013-04-18 23:01:45 +02:00
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*temp = cur_temp;
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/* Temperature code lies between min 25 and max 125 */
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if (cur_temp >= data->ts.start_tripping &&
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cur_temp <= data->ts.max_val)
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return TMU_STATUS_TRIPPED;
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else if (cur_temp >= data->ts.start_warning)
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return TMU_STATUS_WARNING;
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else if (cur_temp < data->ts.start_warning &&
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cur_temp >= data->ts.min_val)
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return TMU_STATUS_NORMAL;
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/* Temperature code does not lie between min 25 and max 125 */
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else {
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2013-04-18 23:21:15 +02:00
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info->tmu_state = TMU_STATUS_INIT;
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printk(BIOS_DEBUG, "EXYNOS_TMU: Thermal reading failed\n");
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2013-04-18 23:01:45 +02:00
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return -1;
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}
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return 0;
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}
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/*
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* Calibrate and calculate threshold values and
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* enable interrupt levels
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*
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* @param info pointer to the tmu_info struct
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*/
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2013-04-18 23:21:15 +02:00
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static void tmu_setup_parameters(struct tmu_info *info)
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2013-04-18 23:01:45 +02:00
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{
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unsigned int te_temp, con;
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unsigned int warning_code, trip_code, hwtrip_code;
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unsigned int cooling_temp;
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unsigned int rising_value;
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struct tmu_data *data = &info->data;
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struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base;
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/* Must reload for using efuse value at EXYNOS */
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arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(®->triminfo_control, TRIMINFO_RELOAD);
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2013-04-18 23:01:45 +02:00
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/* Get the compensation parameter */
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arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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te_temp = read32(®->triminfo);
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2013-04-18 23:01:45 +02:00
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info->te1 = te_temp & TRIM_INFO_MASK;
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info->te2 = ((te_temp >> 8) & TRIM_INFO_MASK);
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if ((data->efuse_min_value > info->te1) ||
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(info->te1 > data->efuse_max_value)
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|| (info->te2 != 0))
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info->te1 = data->efuse_value;
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/* Get RISING & FALLING Threshold value */
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warning_code = data->ts.start_warning
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+ info->te1 - info->dc_value;
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trip_code = data->ts.start_tripping
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+ info->te1 - info->dc_value;
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hwtrip_code = data->ts.hardware_tripping
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+ info->te1 - info->dc_value;
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cooling_temp = 0;
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rising_value = ((warning_code << 8) |
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(trip_code << 16) |
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(hwtrip_code << 24));
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/* Set interrupt level */
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arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(®->threshold_temp_rise, rising_value);
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write32(®->threshold_temp_fall, cooling_temp);
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2013-04-18 23:01:45 +02:00
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/*
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* Need to init all register settings after getting parameter info
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* [28:23] vref [11:8] slope - Tuning parameter
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*
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* WARNING: this slope value writes into many bits in the tmu_control
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* register, with the default FDT value of 268470274 (0x10008802)
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* we are using this essentially sets the default register setting
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* from the TRM for tmu_control.
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* TODO(bhthompson): rewrite this code such that we are not performing
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* a hard wipe of tmu_control and re verify functionality.
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*/
|
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(®->tmu_control, data->slope);
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2013-04-18 23:01:45 +02:00
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|
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(®->intclear, INTCLEARALL);
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2013-04-18 23:01:45 +02:00
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/* TMU core enable */
|
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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con = read32(®->tmu_control);
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2013-04-18 23:01:45 +02:00
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con |= (info->tmu_mux << 20) | THERM_TRIP_EN | CORE_EN;
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|
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(®->tmu_control, con);
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2013-04-18 23:01:45 +02:00
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/* Enable HW thermal trip */
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power_enable_hw_thermal_trip();
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/* LEV1 LEV2 interrupt enable */
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arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/:
@@
expression A, V;
@@
- writel(V, A)
+ write32(A, V)
@@
expression A, V;
@@
- writew(V, A)
+ write16(A, V)
@@
expression A, V;
@@
- writeb(V, A)
+ write8(A, V)
@@
expression A;
@@
- readl(A)
+ read32(A)
@@
expression A;
@@
- readb(A)
+ read8(A)
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6
Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254864
Reviewed-on: http://review.coreboot.org/9836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-19 23:51:15 +01:00
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write32(®->inten, INTEN_RISE1 | INTEN_RISE2);
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2013-04-18 23:01:45 +02:00
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}
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/*
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* Initialize TMU device
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*
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* @return int value, 0 for success
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*/
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2013-04-18 23:21:15 +02:00
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int tmu_init(struct tmu_info *info)
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2013-04-18 23:01:45 +02:00
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{
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2013-04-18 23:21:15 +02:00
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info->tmu_state = TMU_STATUS_INIT;
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2013-04-18 23:01:45 +02:00
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2013-04-18 23:21:15 +02:00
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tmu_setup_parameters(info);
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info->tmu_state = TMU_STATUS_NORMAL;
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2013-04-18 23:01:45 +02:00
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return 0;
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}
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