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coreboot-kgpe-d16/src/soc/mediatek/mt8183/Makefile.inc

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mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
mediatek/mt8183: Add watchdog timer support Using common watchdog timer (WDT) code for reset. Set up watchdog timer in mtk_wdt_init() to get reset status and disable auto-reboot. Link common do_hard_reset() to support hard reset. BUG=b:80501386 BRANCH=none TEST=both mtk_wdt_init() and do_hard_reset() work on Kukui. Change-Id: I4be3a133dbb8a64604133cefb0c5f02d01afd0d4 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-01 08:33:11 +02:00
bootblock-y += bootblock.c
mediatek/mt8183: Add GPIO support This patch implements gpio_set_pull() and links the common MediaTek GPIO code to support IO config for other drivers (ex. SPI) and the requested functions in src/include/gpio.h. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Ia2b0d88e9b70c9ad148797d77dc9e79ce1bcb64a Signed-off-by: Po Xu <jg_poxu@mediatek.com> Reviewed-on: https://review.coreboot.org/27417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-16 12:41:49 +02:00
bootblock-y += ../common/gpio.c gpio.c
mediatek/mt8183: add PLL and clock init support Add PLL and clock init code. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Checked with frequency meter in SOC. Change-Id: I1f561f66bcf12de6a95c2f64eecd9508bd9bb26c Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-on: https://review.coreboot.org/27031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-01 08:58:54 +02:00
bootblock-y += ../common/pll.c pll.c
mediatek/mt8183: Add SPI support This patch implements SOC-specific code of mt8183 and link the common code to support SPI bus. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Signed-off-by: mengqi.zhang <mengqi.zhang@mediatek.com> Change-Id: I544e850299c74861313c2425721479fe5b91639e Reviewed-on: https://review.coreboot.org/27498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-02 17:23:00 +02:00
bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
bootblock-y += ../common/timer.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
endif
mediatek/mt8183: Add watchdog timer support Using common watchdog timer (WDT) code for reset. Set up watchdog timer in mtk_wdt_init() to get reset status and disable auto-reboot. Link common do_hard_reset() to support hard reset. BUG=b:80501386 BRANCH=none TEST=both mtk_wdt_init() and do_hard_reset() work on Kukui. Change-Id: I4be3a133dbb8a64604133cefb0c5f02d01afd0d4 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-01 08:33:11 +02:00
bootblock-y += ../common/wdt.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
mediatek/mt8183: Enable bootblock self-decompression MT8183 only allows booting from eMMC, so we have to do eMMC emulation from an external source, for example EC, which makes the size of bootblock very important. A fully functional bootblock (that can boot into verstage or romstage) is about 38000 bytes. If self decompression (CONFIG_COMPRESS_BOOTBLOCK) is enabled, only 25088 (66%) bytes are needed. Inspired from crosreview.com/1070018. BUG=b:80501386 TEST=manually flashed into kukui and boots into romstage. Change-Id: I7a739866a4ea3bcafe2ff7b9e88d5ed00f3f3e40 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/27599 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-26 07:42:04 +02:00
decompressor-y += decompressor.c
decompressor-y += ../common/mmu_operations.c
decompressor-y += ../common/timer.c
mediatek/mt8183: Add GPIO support This patch implements gpio_set_pull() and links the common MediaTek GPIO code to support IO config for other drivers (ex. SPI) and the requested functions in src/include/gpio.h. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Ia2b0d88e9b70c9ad148797d77dc9e79ce1bcb64a Signed-off-by: Po Xu <jg_poxu@mediatek.com> Reviewed-on: https://review.coreboot.org/27417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-16 12:41:49 +02:00
verstage-y += ../common/gpio.c gpio.c
mediatek/mt8183: Add SPI support This patch implements SOC-specific code of mt8183 and link the common code to support SPI bus. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Signed-off-by: mengqi.zhang <mengqi.zhang@mediatek.com> Change-Id: I544e850299c74861313c2425721479fe5b91639e Reviewed-on: https://review.coreboot.org/27498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-02 17:23:00 +02:00
verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
verstage-y += ../common/timer.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
mediatek/mt8183: Add watchdog timer support Using common watchdog timer (WDT) code for reset. Set up watchdog timer in mtk_wdt_init() to get reset status and disable auto-reboot. Link common do_hard_reset() to support hard reset. BUG=b:80501386 BRANCH=none TEST=both mtk_wdt_init() and do_hard_reset() work on Kukui. Change-Id: I4be3a133dbb8a64604133cefb0c5f02d01afd0d4 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-01 08:33:11 +02:00
verstage-y += ../common/wdt.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
arm64: Factor out common parts of romstage execution flow The romstage main() entry point on arm64 boards is usually in mainboard code, but there are a handful of lines that are always needed in there and not really mainboard specific (or chipset specific). We keep arguing every once in a while that this isn't ideal, so rather than arguing any longer let's just fix it. This patch moves the main() function into arch code with callbacks that the platform can hook into. (This approach can probably be expanded onto other architectures, so when that happens this file should move into src/lib.) Tested on Cheza and Kevin. I think the approach is straight-forward enough that we can take this without testing every board. (Note that in a few cases, this delays some platform-specific calls until after console_init() and exception_init()... since these functions don't really take that long, especially if there is no serial console configured, I don't expect this to cause any issues.) Change-Id: I7503acafebabed00dfeedb00b1354a26c536f0fe Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/28199 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-11 01:13:26 +02:00
romstage-y += ../common/cbmem.c emi.c
mediatek/mt8183: Add EMI init for DDR driver init Add EMI config to initialize memory. BRANCH=none TEST=Boots correctly on Kukui, and inits DRAM successfully with related patches. Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Change-Id: I945181aa1c901fe78ec1f4478a928c600c1b1dea Reviewed-on: https://review.coreboot.org/28835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2018-09-26 08:24:02 +02:00
romstage-y += memory.c
mediatek/mt8183: Add GPIO support This patch implements gpio_set_pull() and links the common MediaTek GPIO code to support IO config for other drivers (ex. SPI) and the requested functions in src/include/gpio.h. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Ia2b0d88e9b70c9ad148797d77dc9e79ce1bcb64a Signed-off-by: Po Xu <jg_poxu@mediatek.com> Reviewed-on: https://review.coreboot.org/27417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-16 12:41:49 +02:00
romstage-y += ../common/gpio.c gpio.c
mediatek/mt8183: Add MMU operation support Enable MMU in bootblock for performance, link common code to provide mtk_mmu_after_dram() to update MMU table in romstage after dram ready, implement mtk_soc_disable_l2c_sram(), and call mtk_mmu_disable_l2c_sram() to turn off L2C sram in ramstage. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Change-Id: I4e35f8276ca23de7fd13da3515b9f48d944ead32 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-08 12:21:45 +02:00
romstage-y += ../common/mmu_operations.c mmu_operations.c
mediatek/mt8183: Add SPI support This patch implements SOC-specific code of mt8183 and link the common code to support SPI bus. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Signed-off-by: mengqi.zhang <mengqi.zhang@mediatek.com> Change-Id: I544e850299c74861313c2425721479fe5b91639e Reviewed-on: https://review.coreboot.org/27498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-02 17:23:00 +02:00
romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
romstage-y += ../common/timer.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
mediatek/mt8183: Add watchdog timer support Using common watchdog timer (WDT) code for reset. Set up watchdog timer in mtk_wdt_init() to get reset status and disable auto-reboot. Link common do_hard_reset() to support hard reset. BUG=b:80501386 BRANCH=none TEST=both mtk_wdt_init() and do_hard_reset() work on Kukui. Change-Id: I4be3a133dbb8a64604133cefb0c5f02d01afd0d4 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-01 08:33:11 +02:00
romstage-y += ../common/wdt.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
ramstage-y += ../common/cbmem.c emi.c
mediatek/mt8183: Add GPIO support This patch implements gpio_set_pull() and links the common MediaTek GPIO code to support IO config for other drivers (ex. SPI) and the requested functions in src/include/gpio.h. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Ia2b0d88e9b70c9ad148797d77dc9e79ce1bcb64a Signed-off-by: Po Xu <jg_poxu@mediatek.com> Reviewed-on: https://review.coreboot.org/27417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-16 12:41:49 +02:00
ramstage-y += ../common/gpio.c gpio.c
mediatek/mt8183: Add MMU operation support Enable MMU in bootblock for performance, link common code to provide mtk_mmu_after_dram() to update MMU table in romstage after dram ready, implement mtk_soc_disable_l2c_sram(), and call mtk_mmu_disable_l2c_sram() to turn off L2C sram in ramstage. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Change-Id: I4e35f8276ca23de7fd13da3515b9f48d944ead32 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-08 12:21:45 +02:00
ramstage-y += ../common/mmu_operations.c mmu_operations.c
mediatek/mt8183: Add mtcmos init support Using common mtcmos code to power on audio and display modules in SOC. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Passes the status check at the end of mtcmos_power_on() Change-Id: I41f16ba36432a8bbc47793cec2979753c9f84b43 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-05 06:20:00 +02:00
ramstage-y += ../common/mtcmos.c mtcmos.c
mediatek/mt8183: Add MMU operation support Enable MMU in bootblock for performance, link common code to provide mtk_mmu_after_dram() to update MMU table in romstage after dram ready, implement mtk_soc_disable_l2c_sram(), and call mtk_mmu_disable_l2c_sram() to turn off L2C sram in ramstage. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Change-Id: I4e35f8276ca23de7fd13da3515b9f48d944ead32 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-08 12:21:45 +02:00
ramstage-y += soc.c
mediatek/mt8183: Add SPI support This patch implements SOC-specific code of mt8183 and link the common code to support SPI bus. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Signed-off-by: mengqi.zhang <mengqi.zhang@mediatek.com> Change-Id: I544e850299c74861313c2425721479fe5b91639e Reviewed-on: https://review.coreboot.org/27498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-07-02 17:23:00 +02:00
ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
ramstage-y += ../common/timer.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
mediatek/mt8183: Add USB support This patch implements SoC-specific defines of mt8183 and links the common code to support USB. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I1224cf24f92b07f3c1814f1cbfef96aafa5a992b Signed-off-by: Jumin Li <jumin.li@mediatek.com> Reviewed-on: https://review.coreboot.org/28787 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-20 11:40:45 +02:00
ramstage-y += ../common/usb.c
mediatek/mt8183: Add watchdog timer support Using common watchdog timer (WDT) code for reset. Set up watchdog timer in mtk_wdt_init() to get reset status and disable auto-reboot. Link common do_hard_reset() to support hard reset. BUG=b:80501386 BRANCH=none TEST=both mtk_wdt_init() and do_hard_reset() work on Kukui. Change-Id: I4be3a133dbb8a64604133cefb0c5f02d01afd0d4 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27026 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-01 08:33:11 +02:00
ramstage-y += ../common/wdt.c
mediatek/mt8183: Add a stub implementation of the MT8183 SOC Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-31 03:20:53 +02:00
CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
./util/mtkheader/gen-bl-img.py mt8183 emmc $< $@
endif
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