2015-05-13 03:19:47 +02:00
|
|
|
/*
|
|
|
|
* This file is part of the coreboot project.
|
|
|
|
*
|
|
|
|
* Copyright (C) 2008-2009 coresystems GmbH
|
|
|
|
* Copyright (C) 2014 Google Inc.
|
2020-02-20 07:39:45 +01:00
|
|
|
* Copyright (C) 2015-2020 Intel Corporation.
|
2015-05-13 03:19:47 +02:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation; version 2 of the License.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*/
|
|
|
|
|
2017-12-14 13:48:34 +01:00
|
|
|
#include <intelblocks/smihandler.h>
|
2015-05-13 03:19:47 +02:00
|
|
|
#include <soc/pm.h>
|
|
|
|
|
2017-12-14 13:48:34 +01:00
|
|
|
const smi_handler_t southbridge_smi[SMI_STS_BITS] = {
|
|
|
|
[SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep,
|
|
|
|
[APM_STS_BIT] = smihandler_southbridge_apmc,
|
|
|
|
[PM1_STS_BIT] = smihandler_southbridge_pm1,
|
|
|
|
[GPE0_STS_BIT] = smihandler_southbridge_gpe0,
|
|
|
|
[GPIO_STS_BIT] = smihandler_southbridge_gpi,
|
|
|
|
[ESPI_SMI_STS_BIT] = smihandler_southbridge_espi,
|
|
|
|
[MCSMI_STS_BIT] = smihandler_southbridge_mc,
|
|
|
|
[TCO_STS_BIT] = smihandler_southbridge_tco,
|
|
|
|
[PERIODIC_STS_BIT] = smihandler_southbridge_periodic,
|
|
|
|
[MONITOR_STS_BIT] = smihandler_southbridge_monitor,
|
|
|
|
};
|