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coreboot-kgpe-d16/src/include/device/pci_ops.h

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- Small step forward Linux boots and almost works... git-svn-id: svn://svn.coreboot.org/coreboot/trunk@795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 08:25:08 +02:00
#ifndef PCI_OPS_H
#define PCI_OPS_H
#include <stdint.h>
- Modify the freebios tree so the pci config space api is mostly in sync between code that runs without ram and code that runs with ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 21:23:51 +02:00
#include <device/device.h>
- Update abuild.sh so it will rebuild successfull builds - Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04 12:04:33 +01:00
#include <arch/pci_ops.h>
- Modify the freebios tree so the pci config space api is mostly in sync between code that runs without ram and code that runs with ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 21:23:51 +02:00
Various cosmetic and coding style fixes in src/devices. Also: - Improve a few code comments, fix typos, etc. - Change a few more variable types to u8/u16/u32 etc. - Make some very long lines fit into 80chars/line. - Drop a huge duplicated comment, use "@see" to refer to the other one. - Reduce nesting level a bit by restructuring some code chunks. - s/Config.lb/devicetree.cb/ in a few places. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:23:47 +01:00
u8 pci_read_config8(device_t dev, unsigned int where);
u16 pci_read_config16(device_t dev, unsigned int where);
u32 pci_read_config32(device_t dev, unsigned int where);
void pci_write_config8(device_t dev, unsigned int where, u8 val);
void pci_write_config16(device_t dev, unsigned int where, u16 val);
void pci_write_config32(device_t dev, unsigned int where, u32 val);
- Modify the freebios tree so the pci config space api is mostly in sync between code that runs without ram and code that runs with ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 21:23:51 +02:00
This patch unifies the use of config options in v2 to all start with CONFIG_ It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30 17:17:49 +02:00
#if CONFIG_MMCONF_SUPPORT
Various cosmetic and coding style fixes in src/devices. Also: - Improve a few code comments, fix typos, etc. - Change a few more variable types to u8/u16/u32 etc. - Make some very long lines fit into 80chars/line. - Drop a huge duplicated comment, use "@see" to refer to the other one. - Reduce nesting level a bit by restructuring some code chunks. - s/Config.lb/devicetree.cb/ in a few places. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:23:47 +01:00
u8 pci_mmio_read_config8(device_t dev, unsigned int where);
u16 pci_mmio_read_config16(device_t dev, unsigned int where);
u32 pci_mmio_read_config32(device_t dev, unsigned int where);
void pci_mmio_write_config8(device_t dev, unsigned int where, u8 val);
void pci_mmio_write_config16(device_t dev, unsigned int where, u16 val);
void pci_mmio_write_config32(device_t dev, unsigned int where, u32 val);
Fix mmconf (PCIe memory mapped config space access) support in v2. It was horribly broken and thus never used by any platform. This needs to get straightened out so current chipsets drivers can use the full feature set. Create wrapper functions similar to the io pci config space ones. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3981 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06 20:11:52 +01:00
#endif
- Small step forward Linux boots and almost works... git-svn-id: svn://svn.coreboot.org/coreboot/trunk@795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-24 08:25:08 +02:00
#endif /* PCI_OPS_H */
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