2015-06-21 00:17:12 +02:00
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2011 Google Inc.
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## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc.
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##
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config HAVE_INTEL_FIRMWARE
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bool
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help
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Chipset uses the Intel Firmware Descriptor to describe the
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layout of the SPI ROM chip.
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if HAVE_INTEL_FIRMWARE
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comment "Intel Firmware"
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config HAVE_IFD_BIN
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bool "Add Intel descriptor.bin file"
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help
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The descriptor binary
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config IFD_BIN_PATH
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string "Path and filename of the descriptor.bin file"
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depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD
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config HAVE_ME_BIN
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2015-06-24 03:59:30 +02:00
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bool "Add Intel ME/TXE firmware"
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2015-06-27 16:59:10 +02:00
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depends on HAVE_IFD_BIN
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2015-06-21 00:17:12 +02:00
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help
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The Intel processor in the selected system requires a special firmware
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2015-06-24 03:59:30 +02:00
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for an integrated controller. This might be called the Management
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Engine (ME), the Trusted Execution Engine (TXE) or something else
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depending on the chip. This firmware might or might not be available
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in coreboot's 3rdparty/blobs repository. If it is not and if you don't
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have access to the firmware from elsewhere, you can still build
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coreboot without it. In this case however, you'll have to make sure
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that you don't overwrite your ME/TXE firmware on your flash ROM.
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2015-06-21 00:17:12 +02:00
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config ME_BIN_PATH
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string "Path to management engine firmware"
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depends on HAVE_ME_BIN
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##### Fake IFD #####
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config BUILD_WITH_FAKE_IFD
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bool "Build with a fake IFD" if !HAVE_IFD_BIN
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help
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If you don't have an Intel Firmware Descriptor (descriptor.bin) for your
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board, you can select this option and coreboot will build without it.
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The resulting coreboot.rom will not contain all parts required
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to get coreboot running on your board. You can however write only the
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BIOS section to your board's flash ROM and keep the other sections
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untouched. Unfortunately the current version of flashrom doesn't
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support this yet. But there is a patch pending [1].
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WARNING: Never write a complete coreboot.rom to your flash ROM if it
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was built with a fake IFD. It just won't work.
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[1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html
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config IFD_BIOS_SECTION
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depends on BUILD_WITH_FAKE_IFD
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2015-06-24 05:49:56 +02:00
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string "BIOS Region Starting:Ending addresses within the ROM"
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default ""
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help
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The BIOS region is typically the size of the CBFS area, and is located
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at the end of the ROM space.
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For an 8MB ROM with a 3MB CBFS area, this would look like:
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0x00500000:0x007fffff
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2015-06-21 00:17:12 +02:00
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config IFD_ME_SECTION
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depends on BUILD_WITH_FAKE_IFD
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string "ME/TXE Region Starting:Ending addresses within the ROM"
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default ""
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2015-06-24 05:49:56 +02:00
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help
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The ME/TXE region typically starts at around 0x1000 and often fills the
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ROM space not used by CBFS.
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For an 8MB ROM with a 3MB CBFS area, this might look like:
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0x00001000:0x004fffff
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2015-06-21 00:17:12 +02:00
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config IFD_GBE_SECTION
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depends on BUILD_WITH_FAKE_IFD
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string "GBE Region Starting:Ending addresses within the ROM"
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default ""
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help
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The Gigabit Ethernet ROM region is used when an Intel NIC is built into
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the Southbridge/SOC and the platform uses this device instead of an external
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PCIe NIC. It will be located between the ME/TXE and the BIOS region.
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Leave this empty if you're unsure.
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2015-06-21 00:17:12 +02:00
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config IFD_PLATFORM_SECTION
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depends on BUILD_WITH_FAKE_IFD
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string "Platform Region Starting:Ending addresses within the Rom"
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2015-06-21 00:17:12 +02:00
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default ""
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2015-06-24 05:49:56 +02:00
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help
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The Platform region is used for platform specific data.
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It will be located between the ME/TXE and the BIOS region.
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Leave this empty if you're unsure.
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2015-06-21 00:17:12 +02:00
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2015-06-24 05:47:19 +02:00
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config LOCK_MANAGEMENT_ENGINE
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bool "Lock ME/TXE section"
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depends on HAVE_ME_BIN
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default n
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help
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The Intel Firmware Descriptor supports preventing write accesses
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from the host to the ME or TXE section in the firmware
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descriptor. If the section is locked, it can only be overwritten
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with an external SPI flash programmer. You will want this if you
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want to increase security of your ROM image once you are sure
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that the ME/TXE firmware is no longer going to change.
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If unsure, say N.
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2015-06-21 00:17:12 +02:00
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endif #INTEL_FIRMWARE
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