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coreboot-kgpe-d16/util/romcc/Makefile

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- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-28 08:49:45 +02:00
VERSION:=0.32
RELEASE_DATE:=28 June 2003
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 20:44:01 +02:00
PACKAGE:=romcc
# Move the configuration defines to makefile.conf
- Set the default compiler back to gcc ooops git-svn-id: svn://svn.coreboot.org/coreboot/trunk@915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-25 13:34:59 +02:00
CC=gcc
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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CPPFLAGS=-DVERSION='"$(VERSION)"' -DRELEASE_DATE='"$(RELEASE_DATE)"'
- Update the romcc version. - Add an additional consistency check to romcc and fix the more obvious problems it has uncovered With this update there are no known silent failures in romcc. - Update the memory initialization code to setup all 3 of the memory sizing registers properly - In auto.c test our dynamic maximum amount of ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19 17:14:52 +02:00
CFLAGS= -g -Wall $(CPPFLAGS)
- Factoring of auto.c - Implementation of fallback/normal support for the amd solo board - Minor bugfix in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11 23:55:00 +02:00
CPROF_FLAGS=-pg -fprofile-arcs
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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all: romcc test
romcc: romcc.c Makefile
$(CC) $(CFLAGS) -o $@ $<
- Factoring of auto.c - Implementation of fallback/normal support for the amd solo board - Minor bugfix in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11 23:55:00 +02:00
romcc_pg: romcc.c Makefile
$(CC) $(CFLAGS) $(CPROF_FLAGS) -o $@ $<
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 20:44:01 +02:00
TESTS=\
hello_world.c \
- Update the romcc version. - Add an additional consistency check to romcc and fix the more obvious problems it has uncovered With this update there are no known silent failures in romcc. - Update the memory initialization code to setup all 3 of the memory sizing registers properly - In auto.c test our dynamic maximum amount of ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19 17:14:52 +02:00
hello_world2.c \
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 20:44:01 +02:00
simple_test.c \
simple_test2.c \
simple_test3.c \
simple_test4.c \
simple_test5.c \
simple_test6.c \
simple_test7.c \
simple_test8.c \
simple_test9.c \
simple_test10.c \
simple_test11.c \
simple_test12.c \
simple_test13.c \
simple_test14.c \
simple_test15.c \
- Implement support for structures, typedefs, and __builtin_rdmsr, __builtin_wrmsr in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-09 04:39:00 +02:00
simple_test16.c \
simple_test17.c \
simple_test18.c \
simple_test19.c \
- Add a test to make certain romcc is properly allocating registers. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-13 22:45:19 +02:00
simple_test20.c \
- Update romcc to version 0.27 and add more tests. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-10 23:22:07 +02:00
simple_test21.c \
simple_test22.c \
simple_test23.c \
simple_test24.c \
simple_test25.c \
simple_test26.c \
simple_test27.c \
simple_test28.c \
simple_test29.c \
simple_test30.c \
- Factoring of auto.c - Implementation of fallback/normal support for the amd solo board - Minor bugfix in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11 23:55:00 +02:00
simple_test31.c \
- Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones... - Update apic.h to include the APIC_TASK_PRI register definition - Update mptable.c to have a reasonable board OEM and productid - Additional testfiles for romcc. - Split out auto.c and early failover.c moving their generic bits elsewere - Enable cache of the rom - Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 10:42:17 +02:00
simple_test32.c \
- A new test case for romcc - Minor romcc fixes - In smbus_wail_until_done a romcc glitch with || in romcc where it likes to run out of registers. Use | to be explicit that I don't need the short circuiting behavior. - Remove unused #defines from coherent_ht.c - Update the test in auto.c to 512M - Add definition of log2 to romcc_io.h - Implement SPD memory sizing in raminit.c - Reduce the number of memory devices back 2 to for the SOLO board. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18 13:03:18 +02:00
simple_test33.c \
- Update the romcc version. - Add an additional consistency check to romcc and fix the more obvious problems it has uncovered With this update there are no known silent failures in romcc. - Update the memory initialization code to setup all 3 of the memory sizing registers properly - In auto.c test our dynamic maximum amount of ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19 17:14:52 +02:00
simple_test34.c \
simple_test35.c \
simple_test36.c \
simple_test37.c \
- Implement goto support - Register allocator bug fixes. * coalesce_live_ranges now also updates the interference graph of live instructions * resolve_tangle now avoids copies to phi * correct_tangles is now called in a loop so that all tangles get fixed - Bug the version of romcc to 0.30 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-20 16:43:20 +02:00
simple_test38.c \
- Error on function prototypes - Fix a last couple of structure related bugs git-svn-id: svn://svn.coreboot.org/coreboot/trunk@914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-25 12:38:10 +02:00
simple_test39.c \
- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-28 08:49:45 +02:00
simple_test40.c \
simple_test41.c \
simple_test42.c \
simple_test43.c \
simple_test44.c \
simple_test45.c \
simple_test46.c \
simple_test47.c \
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 20:44:01 +02:00
raminit_test.c \
- Update romcc to version 0.27 and add more tests. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-10 23:22:07 +02:00
raminit_test2.c \
- Reduce the algorithmic complexity of parts of the register allocator so the worst case runtime of romcc is much more predictable git-svn-id: svn://svn.coreboot.org/coreboot/trunk@879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-16 18:57:34 +02:00
raminit_test3.c \
raminit_test4.c
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 20:44:01 +02:00
- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-28 08:49:45 +02:00
FAIL_TESTS = \
fail_test1.c
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 20:44:01 +02:00
TEST_SRCS:=$(patsubst %, tests/%, $(TESTS))
TEST_ASM:=$(patsubst %.c, tests/%.S, $(TESTS))
TEST_OBJ:=$(patsubst %.c, tests/%.o, $(TESTS))
TEST_ELF:=$(patsubst %.c, tests/%.elf, $(TESTS))
- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-28 08:49:45 +02:00
FAIL_SRCS:=$(patsubst %, tests/%, $(FAIL_TESTS))
FAIL_OUT:=$(patsubst %.c, tests/%.out, $(FAIL_TESTS))
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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$(TEST_ASM): %.S: %.c romcc
- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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export ALLOC_CHECK_=2; ./romcc -mcpu=k8 -O -o $@ $< > $*.debug
$(FAIL_OUT): %.out: %.c romcc
export ALLOC_CHECK_=2; if ./romcc -O -o $*.S $< > $*.debug 2> $@ ; then exit 1 ; else exit 0 ; fi
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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$(TEST_OBJ): %.o: %.S
as $< -o $@
- Update romcc to version 0.27 and add more tests. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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$(TEST_ELF): %.elf: %.o tests/ldscript.ld
ld -T tests/ldscript.ld $< -o $@
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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test: $(TEST_ELF)
echo:
echo "TEST_SRCS=$(TEST_SRCS)"
echo "TEST_ASM=$(TEST_ASM)"
echo "TEST_OBJ=$(TEST_OBJ)"
echo "TEST_ELF=$(TEST_ELF)"
- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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echo ""
echo "FAIL_SRCS=$(FAIL_SRCS)"
echo "FAIL_ASM=$(FAIL_ASM)"
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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clean:
- Update romcc so that it more successfully spills registers to the xmm registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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rm -f romcc romcc_pg core $(TEST_ASM) $(TEST_OBJ) $(TEST_ELF) tests/*.debug tests/*.debug2 tests/*.gmon.out tests/*.out
- Checking latest version of romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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