2003-04-22 21:02:15 +02:00
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static void write_phys(unsigned long addr, unsigned long value)
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{
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2003-06-17 10:42:17 +02:00
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#if HAVE_MOVNTI
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asm volatile(
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"movnti %1, (%0)"
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: /* outputs */
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: "r" (addr), "r" (value) /* inputs */
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2004-05-27 13:13:24 +02:00
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#ifndef __GNUC__
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2003-06-17 10:42:17 +02:00
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: /* clobbers */
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2004-05-27 13:13:24 +02:00
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#endif
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2003-06-17 10:42:17 +02:00
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);
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#else
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2003-05-19 21:16:21 +02:00
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volatile unsigned long *ptr;
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2003-04-22 21:02:15 +02:00
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ptr = (void *)addr;
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*ptr = value;
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2003-06-17 10:42:17 +02:00
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#endif
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2003-04-22 21:02:15 +02:00
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}
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static unsigned long read_phys(unsigned long addr)
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{
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2003-05-19 21:16:21 +02:00
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volatile unsigned long *ptr;
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2003-04-22 21:02:15 +02:00
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ptr = (void *)addr;
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return *ptr;
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}
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2003-06-17 10:42:17 +02:00
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static void ram_fill(unsigned long start, unsigned long stop)
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2003-04-22 21:02:15 +02:00
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{
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unsigned long addr;
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/*
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* Fill.
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*/
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print_debug("DRAM fill: ");
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print_debug_hex32(start);
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print_debug("-");
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print_debug_hex32(stop);
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print_debug("\r\n");
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for(addr = start; addr < stop ; addr += 4) {
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/* Display address being filled */
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2003-06-17 10:42:17 +02:00
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if (!(addr & 0xffff)) {
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2003-04-22 21:02:15 +02:00
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print_debug_hex32(addr);
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2004-11-11 07:53:24 +01:00
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print_debug(" \r");
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2003-04-22 21:02:15 +02:00
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}
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write_phys(addr, addr);
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};
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/* Display final address */
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print_debug_hex32(addr);
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print_debug("\r\nDRAM filled\r\n");
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}
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2003-06-17 10:42:17 +02:00
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static void ram_verify(unsigned long start, unsigned long stop)
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2003-04-22 21:02:15 +02:00
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{
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unsigned long addr;
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2004-11-11 07:53:24 +01:00
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int i = 0;
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2003-04-22 21:02:15 +02:00
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/*
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* Verify.
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*/
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print_debug("DRAM verify: ");
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print_debug_hex32(start);
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print_debug_char('-');
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print_debug_hex32(stop);
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print_debug("\r\n");
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for(addr = start; addr < stop ; addr += 4) {
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unsigned long value;
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/* Display address being tested */
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2003-06-17 10:42:17 +02:00
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if (!(addr & 0xffff)) {
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2003-04-22 21:02:15 +02:00
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print_debug_hex32(addr);
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2004-11-11 07:53:24 +01:00
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print_debug(" \r");
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2003-04-22 21:02:15 +02:00
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}
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value = read_phys(addr);
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if (value != addr) {
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/* Display address with error */
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2006-04-01 06:10:44 +02:00
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print_err("Fail: @0x");
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2003-04-22 21:02:15 +02:00
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print_err_hex32(addr);
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2006-04-01 06:10:44 +02:00
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print_err(" Read value=0x");
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2003-04-22 21:02:15 +02:00
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print_err_hex32(value);
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print_err("\r\n");
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2004-11-11 07:53:24 +01:00
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i++;
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2006-04-01 06:10:44 +02:00
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if(i>256) {
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print_debug("Aborting.\n\r");
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break;
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}
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2003-04-22 21:02:15 +02:00
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}
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}
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/* Display final address */
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print_debug_hex32(addr);
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2006-04-01 06:10:44 +02:00
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if (i) {
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print_debug("\r\nDRAM did _NOT_ verify!\r\n");
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}
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else {
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print_debug("\r\nDRAM range verified.\r\n");
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}
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2003-04-22 21:02:15 +02:00
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}
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2003-06-17 10:42:17 +02:00
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void ram_check(unsigned long start, unsigned long stop)
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2003-04-22 21:02:15 +02:00
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{
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/*
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* This is much more of a "Is my DRAM properly configured?"
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* test than a "Is my DRAM faulty?" test. Not all bits
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* are tested. -Tyson
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*/
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2004-03-22 05:24:29 +01:00
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print_debug("Testing DRAM : ");
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print_debug_hex32(start);
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print_debug("-");
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print_debug_hex32(stop);
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print_debug("\r\n");
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2003-04-22 21:02:15 +02:00
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ram_fill(start, stop);
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ram_verify(start, stop);
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2004-03-22 05:24:29 +01:00
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print_debug("Done.\r\n");
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2003-04-22 21:02:15 +02:00
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}
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