GNUBoot/coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
coreboot-kgpe-d16/src/mainboard/amd/olivehillplus/Kconfig

56 lines
1.2 KiB
Text
Raw Normal View History

mainboard: Add AMD DB-FT3b (Olive Hill+) with Steppe Eagle SoC Create a new mainboard based on the AMD DB-FT3 development board (Olive Hill) using an AMD Steppe Eagle processor. The actual DB-FT3 and DB-FT3b mainboards are identical except for the soldered-down SoC device. The new AMD DB-FT3b development board (Olive Hill+) features: * Mini-ITX form factor * 2x DisplayPort * 1x VGA * Integrated Realtek RTL8111-compatible Ethernet * 2x USB 3.0 ports * 2x USB 2.0 externally-accessible ports * 2x USB 2.0 internally-accessible ports (via headers) * micro LPC header * Integrated platform security processor * 2x Full-size DDR3 DIMM support (1 channel) * Realtek ALC272 HD audio * 2x SATA ports * 1x SD card slot * 1x PCIe (x4) slot * 1x mini-PCIe slot * 8-pin programming header Eliminate the extraneous headers included in PlatformGnbPcie. BiosCallOuts normally has a bunch of extraneous references to the mainboard name. Rather than correct the spelling of a bunch of instances, just get rid of them. For the most part, use the Olive Hill ACPI definitions since the DB-FT3b board ("Olive Hill+") and Olive Hill are the same board with different processors. Change some function prototypes for functions without parameters to void instead of AGESA's VOID. There are no parameters for these functions, so there is no real reason to use VOID. S3 and fan control are not supported. HD audio is not working. Change-Id: I794d7a8f4f948346cfe7cbd443c9aed5f70c99ed Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6681 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-08-15 20:38:21 +02:00
#
# This file is part of the coreboot project.
#
# Copyright (C) 2012 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
if BOARD_AMD_OLIVEHILLPLUS
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
binaryPI: Introduce BINARYPI_LEGACY_WRAPPER and its counterpart We define BINARYPI_LEGACY_WRAPPER a method of calling AGESA via functions in agesawrapper.c file. The approach implemented there makes it very inconvenient to do board-specific customisation or present common platform-specific features. Seems like it also causes assertion errors on AGESA side. The flag is applied here to all boards and then individually removed one at a time, as things get tested. New method is not to call AGESA internal functions directly, but via the dispatcher. AGESA call parameters are routed to hooks in both platform and board -directories, to allow for easy capture or modification as needed. For each AGESA dispatcher call made, eventlog entries are replayed to the console log. Also relocations of AGESA heap that took place are recorded. New method is expected to be compatible with binaryPI. Change-Id: I2900249e60f21a13dc231f4a8a04835e090109d5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/19272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-25 10:21:02 +01:00
select BINARYPI_LEGACY_WRAPPER
AMD: Isolate AGESA and PI build environments To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-10-21 17:22:32 +02:00
select CPU_AMD_PI_00730F01
select NORTHBRIDGE_AMD_PI_00730F01
AMD: Isolate AGESA and PI build environments for southbridge To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ia730f0e45e7c1bdfc0c91e95eb6729a77773e2b9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7388 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-10-21 17:22:32 +02:00
select SOUTHBRIDGE_AMD_PI_AVALON
mainboard: Add AMD DB-FT3b (Olive Hill+) with Steppe Eagle SoC Create a new mainboard based on the AMD DB-FT3 development board (Olive Hill) using an AMD Steppe Eagle processor. The actual DB-FT3 and DB-FT3b mainboards are identical except for the soldered-down SoC device. The new AMD DB-FT3b development board (Olive Hill+) features: * Mini-ITX form factor * 2x DisplayPort * 1x VGA * Integrated Realtek RTL8111-compatible Ethernet * 2x USB 3.0 ports * 2x USB 2.0 externally-accessible ports * 2x USB 2.0 internally-accessible ports (via headers) * micro LPC header * Integrated platform security processor * 2x Full-size DDR3 DIMM support (1 channel) * Realtek ALC272 HD audio * 2x SATA ports * 1x SD card slot * 1x PCIe (x4) slot * 1x mini-PCIe slot * 8-pin programming header Eliminate the extraneous headers included in PlatformGnbPcie. BiosCallOuts normally has a bunch of extraneous references to the mainboard name. Rather than correct the spelling of a bunch of instances, just get rid of them. For the most part, use the Olive Hill ACPI definitions since the DB-FT3b board ("Olive Hill+") and Olive Hill are the same board with different processors. Change some function prototypes for functions without parameters to void instead of AGESA's VOID. There are no parameters for these functions, so there is no real reason to use VOID. S3 and fan control are not supported. HD audio is not working. Change-Id: I794d7a8f4f948346cfe7cbd443c9aed5f70c99ed Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6681 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-08-15 20:38:21 +02:00
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_8192
select GFXUMA
config MAINBOARD_DIR
string
default amd/olivehillplus
config MAINBOARD_PART_NUMBER
string
default "DB-FT3b"
config MAX_CPUS
int
default 4
config IRQ_SLOT_COUNT
int
default 11
config ONBOARD_VGA_IS_PRIMARY
bool
default y
config HUDSON_LEGACY_FREE
bool
default y
endif # BOARD_AMD_OLIVEHILLPLUS
Reference in a new issue Copy permalink