54 lines
1.3 KiB
Text
54 lines
1.3 KiB
Text
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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0x02, // DSDT revision: ACPI v2.0
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"COREv4", // OEM id
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"COREBOOT", // OEM table id
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0x20090419 // OEM revision
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)
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{
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// Some generic macros
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#include "acpi/platform.asl"
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// global NVS and variables
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#include <southbridge/intel/i82801gx/acpi/globalnvs.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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// General Purpose Events
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//#include "acpi/gpe.asl"
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// mainboard specific devices
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#include "acpi/mainboard.asl"
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// Thermal Zone
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//#include "acpi/thermal.asl"
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#include <cpu/intel/common/acpi/cpu.asl>
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Scope (\_SB) {
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Device (PCI0)
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{
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#include <northbridge/intel/i945/acpi/i945.asl>
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#include <southbridge/intel/i82801gx/acpi/ich7.asl>
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}
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}
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/* Chipset specific sleep states */
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#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
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}
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