32 lines
1,005 B
C
32 lines
1,005 B
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __SOC_NVIDIA_TEGRA132_CHIP_H__
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#define __SOC_NVIDIA_TEGRA132_CHIP_H__
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#include <arch/cache.h>
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#include <soc/addressmap.h>
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#define EFAULT 1
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#define EINVAL 2
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struct soc_nvidia_tegra132_config {
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};
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#endif /* __SOC_NVIDIA_TEGRA132_CHIP_H__ */
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