coreboot-kgpe-d16/targets/tyan/s2735/Config.lb

# Sample config file for 
# the Tyan s2735 
# This will make a target directory of ./s2735

target s2735
mainboard tyan/s2735

# Tyan s2735
romimage "normal"
#       48K for SCSI FW
#        option ROM_SIZE = 512*1024-48*1024
#       48K for SCSI FW and 48K for ATI ROM
#       option ROM_SIZE = 512*1024-48*1024-48*1024
#       64K for Etherboot
#        option ROM_SIZE = 512*1024-64*1024
	option USE_FALLBACK_IMAGE=0
        option ROM_IMAGE_SIZE=0x11800
        option XIP_ROM_SIZE=0x20000
	option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#       payload ../../../payloads/filo.zelf
#        payload ../../../payloads/tg3--filo.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
end

romimage "fallback" 
	option USE_FALLBACK_IMAGE=1
        option ROM_IMAGE_SIZE=0x11800
        option XIP_ROM_SIZE=0x20000
	option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#       payload ../../../payloads/filo.zelf
#        payload ../../../payloads/tg3--filo.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
end

buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`# Sample config file for`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# the Tyan s2735`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`# This will make a target directory of ./s2735`

			`target s2735`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`mainboard tyan/s2735`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# Tyan s2735`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`romimage "normal"`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# 48K for SCSI FW`
Uwe Hermann: Here's a patch which makes all "option ROM_SIZE" lines use x*y format which is a lot easier to read and modify, without having to use your brain or a calculator ;-) Tested with abuild, no errors. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2006-09-06 18:42:51 +02:00			`# option ROM_SIZE = 5121024-481024`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# 48K for SCSI FW and 48K for ATI ROM`
Uwe Hermann: Here's a patch which makes all "option ROM_SIZE" lines use x*y format which is a lot easier to read and modify, without having to use your brain or a calculator ;-) Tested with abuild, no errors. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2006-09-06 18:42:51 +02:00			`# option ROM_SIZE = 5121024-481024-48*1024`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`# 64K for Etherboot`
Uwe Hermann: Here's a patch which makes all "option ROM_SIZE" lines use x*y format which is a lot easier to read and modify, without having to use your brain or a calculator ;-) Tested with abuild, no errors. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2006-09-06 18:42:51 +02:00			`# option ROM_SIZE = 5121024-641024`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`option USE_FALLBACK_IMAGE=0`
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-06 19:17:25 +02:00			`option ROM_IMAGE_SIZE=0x11800`
			`option XIP_ROM_SIZE=0x20000`
Rename almost all occurences of LinuxBIOS to coreboot. Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2008-01-18 16:08:58 +01:00			`option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# payload ../../../payloads/tg3--ide_disk.zelf`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`# payload ../../../payloads/filo.elf`
			`# payload ../../../payloads/filo_mem.elf`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# payload ../../../payloads/filo.zelf`
			`# payload ../../../payloads/tg3--filo.zelf`
			`# payload ../../../payloads/e1000--filo.zelf`
			`# payload ../../../payloads/tg3--e1000--filo.zelf`
			`payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`end`

			`romimage "fallback"`
			`option USE_FALLBACK_IMAGE=1`
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-06 19:17:25 +02:00			`option ROM_IMAGE_SIZE=0x11800`
			`option XIP_ROM_SIZE=0x20000`
Rename almost all occurences of LinuxBIOS to coreboot. Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2008-01-18 16:08:58 +01:00			`option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# payload ../../../payloads/tg3--ide_disk.zelf`
			`# payload ../../../payloads/filo.elf`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`# payload ../../../payloads/filo_mem.elf`
s2735 half update git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-22 20:45:36 +02:00			`# payload ../../../payloads/filo.zelf`
			`# payload ../../../payloads/tg3--filo.zelf`
			`# payload ../../../payloads/e1000--filo.zelf`
			`# payload ../../../payloads/tg3--e1000--filo.zelf`
			`payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf`
Intel E7501 P64H2 ICH5R support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-07-01 05:55:03 +02:00			`end`

Rename almost all occurences of LinuxBIOS to coreboot. Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2008-01-18 16:08:58 +01:00			`buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"`