2020-04-02 23:48:12 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2010-09-27 19:53:17 +02:00
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2005-07-06 18:49:52 +02:00
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__fpu_start:
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2010-09-27 19:53:17 +02:00
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/* Preserve BIST. */
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movl %eax, %ebp
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2004-10-14 21:29:29 +02:00
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2010-09-27 19:53:17 +02:00
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/*
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* Clear the CR0[2] bit (the "Emulation" flag, EM).
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*
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* This indicates that the processor has an (internal or external)
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* x87 FPU, i.e. floating point operations will be executed by the
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* hardware (and not emulated in software).
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*
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* Additionally, if this bit is not cleared, MMX/SSE instructions won't
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* work, i.e., they will trigger an invalid opcode exception (#UD).
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*/
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2004-10-14 21:29:29 +02:00
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movl %cr0, %eax
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2010-09-27 19:53:17 +02:00
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andl $~(1 << 2), %eax
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2004-10-14 21:29:29 +02:00
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movl %eax, %cr0
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2010-09-27 19:53:17 +02:00
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/* Restore BIST. */
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movl %ebp, %eax
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