32 lines
873 B
C
32 lines
873 B
C
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <amdblocks/acpimmio.h>
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#include <bootblock_common.h>
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void bootblock_mainboard_early_init(void)
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{
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#if 0
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volatile u32 i, val;
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/* LPC clock? Should happen before enable_serial. */
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/*
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* On Larne, after LpcClkDrvSth is set, it needs some time to be stable,
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* because of the buffer ICS551M
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*/
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for (i = 0; i < 200000; i++)
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val = inb(0xcd6);
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#endif
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}
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