2014-02-14 09:04:31 +01:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <console/uart.h>
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2014-02-27 18:30:18 +01:00
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#include <console/streams.h>
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2014-02-14 09:04:31 +01:00
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#include <device/pci.h>
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2014-11-18 12:21:50 +01:00
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#include <option.h>
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2014-11-18 11:41:16 +01:00
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#include <version.h>
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2014-02-14 09:04:31 +01:00
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2014-02-28 13:37:27 +01:00
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/* While in romstage, console loglevel is built-time constant. */
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static ROMSTAGE_CONST int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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int console_log_level(int msg_level)
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{
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return (console_loglevel >= msg_level);
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}
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2014-01-27 14:09:13 +01:00
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2014-02-14 09:04:31 +01:00
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void console_init(void)
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{
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#if !defined(__PRE_RAM__)
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if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS)
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console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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#endif
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2014-02-27 18:30:18 +01:00
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#if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__)
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2014-02-14 09:04:31 +01:00
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pci_early_bridge_init();
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#endif
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console_hw_init();
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2015-03-04 01:11:18 +01:00
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printk(BIOS_INFO, "\n\ncoreboot-%s%s %s %s starting...\n",
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coreboot_version, coreboot_extra_version, coreboot_build,
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#if defined(__BOOT_BLOCK__)
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"bootblock"
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#elif defined(__PRE_RAM__)
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"romstage"
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#else
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"ramstage"
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2014-02-14 09:04:31 +01:00
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#endif
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2015-03-04 01:11:18 +01:00
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);
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2014-02-14 09:04:31 +01:00
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}
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