28 lines
710 B
C
28 lines
710 B
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Intel Corp.
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* (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <arch/io.h>
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#include <cbmem.h>
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#include <device/pci.h>
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#include <soc/northbridge.h>
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#include <soc/pci_devs.h>
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static uintptr_t smm_region_start(void)
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{
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return ALIGN_DOWN(pci_read_config32(NB_DEV_ROOT, TSEG), 1*MiB);
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}
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void *cbmem_top(void)
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{
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return (void *)smm_region_start();
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}
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