93 lines
2.2 KiB
C
93 lines
2.2 KiB
C
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#include <smbus.h>
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#include <pci.h>
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#include <arch/io.h>
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#define PM_BUS 0
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#define PM_DEVFN PCI_DEVFN(0x1f,3)
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#define SMBUS_IO_BASE 0x1000
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#define SMBHSTSTAT 0
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#define SMBHSTCTL 2
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#define SMBHSTCMD 3
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#define SMBHSTADD 4
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#define SMBHSTDAT0 5
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#define SMBHSTDAT1 6
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#define SMBBLKDAT 7
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void smbus_enable(void)
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{
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unsigned char byte;
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/* iobase addr */
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pcibios_write_config_dword(PM_BUS, PM_DEVFN, 0x20, SMBUS_IO_BASE | 1);
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/* smbus enable */
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pcibios_write_config_byte(PM_BUS, PM_DEVFN, 0x40, 1);
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/* iospace enable */
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pcibios_write_config_word(PM_BUS, PM_DEVFN, 0x4, 1);
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/* Disable interrupt generation */
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outb(0, SMBUS_IO_BASE + SMBHSTCTL);
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}
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void smbus_setup(void)
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{
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outb(0, SMBUS_IO_BASE + SMBHSTSTAT);
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}
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static void smbus_wait_until_ready(void)
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{
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while((inb(SMBUS_IO_BASE + SMBHSTSTAT) & 1) == 1) {
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/* nop */
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}
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}
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static void smbus_wait_until_done(void)
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{
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unsigned char byte;
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do {
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byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
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}
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while((byte &1) == 1);
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while( (byte & ~1) == 0) {
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byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
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}
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}
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int smbus_read_byte(unsigned device, unsigned address, unsigned char *result)
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{
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unsigned char host_status_register;
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unsigned char byte;
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smbus_wait_until_ready();
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/* setup transaction */
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/* disable interrupts */
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outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
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/* set the device I'm talking too */
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outb(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBHSTADD);
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/* set the command/address... */
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outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD);
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/* set up for a byte data read */
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outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x2 << 2), SMBUS_IO_BASE + SMBHSTCTL);
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/* clear any lingering errors, so the transaction will run */
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outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
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/* clear the data byte...*/
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outb(0, SMBUS_IO_BASE + SMBHSTDAT0);
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/* start the command */
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outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40), SMBUS_IO_BASE + SMBHSTCTL);
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/* poll for transaction completion */
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smbus_wait_until_done();
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host_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT);
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/* read results of transaction */
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byte = inb(SMBUS_IO_BASE + SMBHSTDAT0);
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*result = byte;
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return host_status_register != 0x02;
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}
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