2013-10-07 10:57:42 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/i2c.h>
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#include <stdlib.h>
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#include <string.h>
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#include <soc/addressmap.h>
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#include "i2c.h"
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2014-03-27 05:43:53 +01:00
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static int tegra_i2c_send_recv(int bus, int read,
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2013-10-07 10:57:42 +02:00
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uint32_t *headers, int header_words,
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uint8_t *data, int data_len)
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{
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2014-03-27 05:43:53 +01:00
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struct tegra_i2c_bus_info *info = &tegra_i2c_info[bus];
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struct tegra_i2c_regs * const regs = info->base;
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2013-10-07 10:57:42 +02:00
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while (data_len) {
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uint32_t status = read32(®s->fifo_status);
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2013-10-10 08:45:07 +02:00
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int tx_empty = status & I2C_FIFO_STATUS_TX_FIFO_EMPTY_CNT_MASK;
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tx_empty >>= I2C_FIFO_STATUS_TX_FIFO_EMPTY_CNT_SHIFT;
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int rx_full = status & I2C_FIFO_STATUS_RX_FIFO_FULL_CNT_MASK;
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rx_full >>= I2C_FIFO_STATUS_RX_FIFO_FULL_CNT_SHIFT;
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2013-10-07 10:57:42 +02:00
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while (header_words && tx_empty) {
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write32(*headers++, ®s->tx_packet_fifo);
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header_words--;
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tx_empty--;
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}
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if (!header_words) {
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if (read) {
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while (data_len && rx_full) {
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uint32_t word = read32(®s->rx_fifo);
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int todo = MIN(data_len, sizeof(word));
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memcpy(data, &word, todo);
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data_len -= todo;
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data += sizeof(word);
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rx_full--;
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}
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} else {
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while (data_len && tx_empty) {
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uint32_t word;
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int todo = MIN(data_len, sizeof(word));
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memcpy(&word, data, todo);
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write32(word, ®s->tx_packet_fifo);
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data_len -= todo;
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data += sizeof(word);
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tx_empty--;
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}
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}
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}
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uint32_t transfer_status =
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read32(®s->packet_transfer_status);
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2013-10-10 08:45:07 +02:00
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if (transfer_status & I2C_PKT_STATUS_NOACK_ADDR) {
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2013-10-07 10:57:42 +02:00
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printk(BIOS_ERR,
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"%s: The address was not acknowledged.\n",
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__func__);
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2014-03-27 05:43:53 +01:00
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info->reset_func(info->reset_bit);
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2013-10-07 10:57:42 +02:00
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return -1;
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2013-10-10 08:45:07 +02:00
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} else if (transfer_status & I2C_PKT_STATUS_NOACK_DATA) {
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2013-10-07 10:57:42 +02:00
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printk(BIOS_ERR,
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"%s: The data was not acknowledged.\n",
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__func__);
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2014-03-27 05:43:53 +01:00
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info->reset_func(info->reset_bit);
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2013-10-07 10:57:42 +02:00
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return -1;
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2013-10-10 08:45:07 +02:00
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} else if (transfer_status & I2C_PKT_STATUS_ARB_LOST) {
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2013-10-07 10:57:42 +02:00
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printk(BIOS_ERR,
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"%s: Lost arbitration.\n",
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__func__);
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2014-03-27 05:43:53 +01:00
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info->reset_func(info->reset_bit);
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2013-10-07 10:57:42 +02:00
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return -1;
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}
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}
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return 0;
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}
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static int tegra_i2c_request(int bus, unsigned chip, int cont, int restart,
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int read, void *data, int data_len)
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{
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uint32_t headers[3];
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if (restart && cont) {
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printk(BIOS_ERR, "%s: Repeat start and continue xfer are "
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"mutually exclusive.\n", __func__);
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return -1;
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}
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2013-10-10 08:45:07 +02:00
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headers[0] = (0 << IOHEADER_PROTHDRSZ_SHIFT) |
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(1 << IOHEADER_PKTID_SHIFT) |
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(bus << IOHEADER_CONTROLLER_ID_SHIFT) |
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IOHEADER_PROTOCOL_I2C | IOHEADER_PKTTYPE_REQUEST;
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2013-10-07 10:57:42 +02:00
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2013-10-10 08:45:07 +02:00
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headers[1] = (data_len - 1) << IOHEADER_PAYLOADSIZE_SHIFT;
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2013-10-07 10:57:42 +02:00
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uint32_t slave_addr = (chip << 1) | (read ? 1 : 0);
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2013-10-10 08:45:07 +02:00
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headers[2] = IOHEADER_I2C_REQ_ADDR_MODE_7BIT |
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2013-10-07 10:57:42 +02:00
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(slave_addr << IOHEADER_I2C_REQ_SLAVE_ADDR_SHIFT);
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if (read)
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2013-10-10 08:45:07 +02:00
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headers[2] |= IOHEADER_I2C_REQ_READ;
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2013-10-07 10:57:42 +02:00
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if (restart)
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2013-10-10 08:45:07 +02:00
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headers[2] |= IOHEADER_I2C_REQ_REPEAT_START;
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2013-10-07 10:57:42 +02:00
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if (cont)
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2013-10-10 08:45:07 +02:00
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headers[2] |= IOHEADER_I2C_REQ_CONTINUE_XFER;
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2013-10-07 10:57:42 +02:00
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2014-03-27 05:43:53 +01:00
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return tegra_i2c_send_recv(bus, read, headers, ARRAY_SIZE(headers),
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2013-10-07 10:57:42 +02:00
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data, data_len);
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}
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static int i2c_readwrite(unsigned bus, unsigned chip, unsigned addr,
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unsigned alen, uint8_t *buf, unsigned len, int read)
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{
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const uint32_t max_payload =
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2013-10-10 08:45:07 +02:00
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(IOHEADER_PAYLOADSIZE_MASK + 1) >> IOHEADER_PAYLOADSIZE_SHIFT;
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2013-10-07 10:57:42 +02:00
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uint8_t abuf[sizeof(addr)];
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int i;
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for (i = 0; i < alen; i++)
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abuf[i] = addr >> ((alen - i - 1) * 8);
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if (tegra_i2c_request(bus, chip, !read, 0, 0, abuf, alen))
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return -1;
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while (len) {
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int todo = MIN(len, max_payload);
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int cont = (todo < len);
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if (tegra_i2c_request(bus, chip, cont, 0, read, buf, todo)) {
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// We should reset the controller here.
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return -1;
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}
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len -= todo;
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buf += todo;
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}
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return 0;
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}
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int i2c_read(unsigned bus, unsigned chip, unsigned addr,
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unsigned alen, uint8_t *buf, unsigned len)
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{
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return i2c_readwrite(bus, chip, addr, alen, buf, len, 1);
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}
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int i2c_write(unsigned bus, unsigned chip, unsigned addr,
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unsigned alen, const uint8_t *buf, unsigned len)
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{
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return i2c_readwrite(bus, chip, addr, alen, (void *)buf, len, 0);
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}
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void i2c_init(unsigned bus)
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{
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2014-03-27 05:43:53 +01:00
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struct tegra_i2c_regs * const regs = tegra_i2c_info[bus].base;
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2013-10-07 10:57:42 +02:00
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2013-10-10 08:45:07 +02:00
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write32(I2C_CNFG_PACKET_MODE_EN, ®s->cnfg);
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2013-10-07 10:57:42 +02:00
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}
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