2007-04-22 21:08:13 +02:00
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/*
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2008-01-18 11:35:56 +01:00
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* This file is part of the coreboot project.
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2007-04-22 21:08:13 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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2005-01-11 00:16:22 +01:00
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#include <console/console.h>
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2017-04-20 02:31:07 +02:00
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#include <commonlib/endian.h>
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2005-01-11 00:16:22 +01:00
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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2008-08-01 13:25:41 +02:00
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#include <string.h>
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2009-04-14 09:40:01 +02:00
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#include <cbfs.h>
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2017-06-06 19:30:55 +02:00
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#include <cbmem.h>
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#include <arch/acpigen.h>
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2005-01-11 00:16:22 +01:00
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2014-12-26 12:29:09 +01:00
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/* Rmodules don't like weak symbols. */
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2018-04-21 22:45:32 +02:00
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u32 __weak map_oprom_vendev(u32 vendev) { return vendev; }
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2014-12-26 12:29:09 +01:00
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2010-10-17 21:01:48 +02:00
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struct rom_header *pci_rom_probe(struct device *dev)
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2005-01-11 00:16:22 +01:00
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{
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struct rom_header *rom_header;
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struct pci_data *rom_data;
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2009-11-07 00:42:26 +01:00
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/* If it's in FLASH, then don't check device for ROM. */
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2015-05-16 06:39:23 +02:00
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rom_header = cbfs_boot_map_optionrom(dev->vendor, dev->device);
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2009-04-06 22:38:34 +02:00
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2012-04-27 00:04:18 +02:00
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u32 vendev = (dev->vendor << 16) | dev->device;
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2018-08-07 23:51:59 +02:00
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u32 mapped_vendev;
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2012-01-23 23:17:52 +01:00
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2014-12-26 12:29:09 +01:00
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mapped_vendev = map_oprom_vendev(vendev);
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2012-01-23 23:17:52 +01:00
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if (!rom_header) {
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if (vendev != mapped_vendev) {
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2015-05-16 06:39:23 +02:00
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rom_header = cbfs_boot_map_optionrom(
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Extend CBFS to support arbitrary ROM source media.
Summary:
Isolate CBFS underlying I/O to board/arch-specific implementations as
"media stream", to allow loading and booting romstage on non-x86.
CBFS functions now all take a new "media source" parameter; use
CBFS_DEFAULT_MEDIA if you simply want to load from main firmware.
API Changes:
cbfs_find => cbfs_get_file.
cbfs_find_file => cbfs_get_file_content.
cbfs_get_file => cbfs_get_file_content with correct type.
CBFS used to work only on memory-mapped ROM (all x86). For platforms like ARM,
the ROM may come from USB, UART, or SPI -- any serial devices and not available
for memory mapping.
To support these devices (and allowing CBFS to read from multiple source
at the same time), CBFS operations are now virtual-ized into "cbfs_media". To
simplify porting existing code, every media source must support both "reading
into pre-allocated memory (read)" and "read and return an allocated buffer
(map)". For devices without native memory-mapped ROM, "cbfs_simple_buffer*"
provides simple memory mapping simulation.
Every CBFS function now takes a cbfs_media* as parameter. CBFS_DEFAULT_MEDIA
is defined for CBFS functions to automatically initialize a per-board default
media (CBFS will internally calls init_default_cbfs_media). Also revised CBFS
function names relying on memory mapped backend (ex, "cbfs_find" => actually
loads files). Now we only have two getters:
struct cbfs_file *entry = cbfs_get_file(media, name);
void *data = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, name, type);
Test results:
- Verified to work on x86/qemu.
- Compiles on ARM, and follow up commit will provide working SPI driver.
Change-Id: Iac911ded25a6f2feffbf3101a81364625bb07746
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2182
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-22 11:57:56 +01:00
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mapped_vendev >> 16,
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2015-05-16 06:39:23 +02:00
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mapped_vendev & 0xffff);
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2012-01-23 23:17:52 +01:00
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}
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}
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2009-11-07 00:42:26 +01:00
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if (rom_header) {
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2010-11-05 00:23:47 +01:00
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printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n",
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dev_path(dev), rom_header);
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2019-03-06 01:53:33 +01:00
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} else if (!CONFIG(ON_DEVICE_ROM_LOAD)) {
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2019-06-14 23:27:26 +02:00
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printk(BIOS_DEBUG, "PCI Option ROM loading disabled for %s\n",
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dev_path(dev));
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return NULL;
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2009-06-09 16:44:37 +02:00
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} else {
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2015-06-19 07:01:07 +02:00
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uintptr_t rom_address;
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2005-01-14 23:04:49 +01:00
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2009-11-07 00:42:26 +01:00
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rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
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2005-01-11 00:16:22 +01:00
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2009-11-07 00:42:26 +01:00
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if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
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2020-03-01 14:46:38 +01:00
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#if CONFIG(CPU_QEMU_X86)
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2009-11-17 16:20:22 +01:00
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if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
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rom_address = 0xc0000;
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else
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2010-11-05 00:23:47 +01:00
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#endif
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2009-11-17 16:20:22 +01:00
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return NULL;
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2009-11-07 00:42:26 +01:00
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} else {
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2010-11-05 00:23:47 +01:00
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/* Enable expansion ROM address decoding. */
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2009-11-07 00:42:26 +01:00
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pci_write_config32(dev, PCI_ROM_ADDRESS,
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rom_address|PCI_ROM_ADDRESS_ENABLE);
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}
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2019-06-29 21:34:07 +02:00
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rom_address &= PCI_ROM_ADDRESS_MASK;
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2011-10-07 01:47:51 +02:00
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printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n",
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2010-11-05 00:23:47 +01:00
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dev_path(dev), (unsigned long)rom_address);
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2009-11-07 00:42:26 +01:00
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rom_header = (struct rom_header *)rom_address;
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2005-12-02 22:52:30 +01:00
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}
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2005-01-11 00:16:22 +01:00
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2010-11-05 00:23:47 +01:00
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printk(BIOS_SPEW, "PCI expansion ROM, signature 0x%04x, "
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"INIT size 0x%04x, data ptr 0x%04x\n",
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le32_to_cpu(rom_header->signature),
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rom_header->size * 512, le32_to_cpu(rom_header->data));
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2005-01-11 00:16:22 +01:00
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if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
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2010-11-05 00:23:47 +01:00
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printk(BIOS_ERR, "Incorrect expansion ROM header "
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"signature %04x\n", le32_to_cpu(rom_header->signature));
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2005-01-11 00:16:22 +01:00
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return NULL;
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}
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2009-11-07 00:42:26 +01:00
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rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
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2010-11-05 00:23:47 +01:00
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printk(BIOS_SPEW, "PCI ROM image, vendor ID %04x, device ID %04x,\n",
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rom_data->vendor, rom_data->device);
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2012-01-23 23:17:52 +01:00
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/* If the device id is mapped, a mismatch is expected */
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if ((dev->vendor != rom_data->vendor
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|| dev->device != rom_data->device)
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&& (vendev == mapped_vendev)) {
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2010-11-05 00:23:47 +01:00
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printk(BIOS_ERR, "ID mismatch: vendor ID %04x, "
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"device ID %04x\n", rom_data->vendor, rom_data->device);
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2005-01-11 00:16:22 +01:00
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return NULL;
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}
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2010-11-05 00:23:47 +01:00
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printk(BIOS_SPEW, "PCI ROM image, Class Code %04x%02x, "
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"Code Type %02x\n", rom_data->class_hi, rom_data->class_lo,
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rom_data->type);
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2005-01-18 04:10:46 +01:00
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if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
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2010-04-27 08:56:47 +02:00
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printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",
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2010-11-05 00:23:47 +01:00
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(rom_data->class_hi << 8) | rom_data->class_lo,
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dev->class);
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// return NULL;
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2005-01-11 00:16:22 +01:00
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}
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return rom_header;
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}
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2005-12-02 22:52:30 +01:00
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static void *pci_ram_image_start = (void *)PCI_RAM_IMAGE_START;
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2005-01-14 23:04:49 +01:00
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2010-11-05 00:23:47 +01:00
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struct rom_header *pci_rom_load(struct device *dev,
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struct rom_header *rom_header)
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2005-01-11 00:16:22 +01:00
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{
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struct pci_data * rom_data;
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unsigned int rom_size;
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2005-07-06 18:49:59 +02:00
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unsigned int image_size=0;
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2005-01-11 00:16:22 +01:00
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2005-07-06 18:49:59 +02:00
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do {
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2010-11-05 00:23:47 +01:00
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/* Get next image. */
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rom_header = (struct rom_header *)((void *) rom_header
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+ image_size);
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rom_data = (struct pci_data *)((void *) rom_header
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+ le32_to_cpu(rom_header->data));
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image_size = le32_to_cpu(rom_data->ilen) * 512;
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} while ((rom_data->type != 0) && (rom_data->indicator != 0)); // make sure we got x86 version
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2005-07-06 18:49:59 +02:00
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2009-04-22 18:32:18 +02:00
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if (rom_data->type != 0)
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return NULL;
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2005-07-06 18:49:59 +02:00
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rom_size = rom_header->size * 512;
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2005-01-11 00:16:22 +01:00
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2010-11-05 00:23:47 +01:00
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/*
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* We check to see if the device thinks it is a VGA device not
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* whether the ROM image is for a VGA device because some
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* devices have a mismatch between the hardware and the ROM.
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*/
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2019-01-03 10:23:28 +01:00
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if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
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2019-03-06 01:53:33 +01:00
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#if !CONFIG(MULTIPLE_VGA_ADAPTERS)
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2018-05-06 20:32:23 +02:00
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extern struct device *vga_pri; /* Primary VGA device (device.c). */
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2010-11-05 00:23:47 +01:00
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if (dev != vga_pri) return NULL; /* Only one VGA supported. */
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2007-04-10 00:50:12 +02:00
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#endif
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2009-06-09 16:44:37 +02:00
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if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) {
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2010-11-05 00:23:47 +01:00
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printk(BIOS_DEBUG, "Copying VGA ROM Image from %p to "
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"0x%x, 0x%x bytes\n", rom_header,
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PCI_VGA_RAM_IMAGE_START, rom_size);
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memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header,
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rom_size);
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2009-06-09 16:44:37 +02:00
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}
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2005-01-11 00:16:22 +01:00
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return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
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}
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2009-04-22 18:32:18 +02:00
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2010-11-05 00:23:47 +01:00
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printk(BIOS_DEBUG, "Copying non-VGA ROM image from %p to %p, 0x%x "
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"bytes\n", rom_header, pci_ram_image_start, rom_size);
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2009-04-22 18:32:18 +02:00
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memcpy(pci_ram_image_start, rom_header, rom_size);
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pci_ram_image_start += rom_size;
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return (struct rom_header *) (pci_ram_image_start-rom_size);
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2005-01-11 00:16:22 +01:00
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}
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2016-03-31 20:04:23 +02:00
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/* ACPI */
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2019-03-06 01:53:33 +01:00
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#if CONFIG(HAVE_ACPI_TABLES)
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2017-04-20 02:31:07 +02:00
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/* VBIOS may be modified after oprom init so use the copy if present. */
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static struct rom_header *check_initialized(struct device *dev)
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{
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struct rom_header *run_rom;
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struct pci_data *rom_data;
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2019-03-06 01:53:33 +01:00
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if (!CONFIG(VGA_ROM_RUN))
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2017-04-20 02:31:07 +02:00
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return NULL;
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run_rom = (struct rom_header *)(uintptr_t)PCI_VGA_RAM_IMAGE_START;
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if (read_le16(&run_rom->signature) != PCI_ROM_HDR)
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return NULL;
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rom_data = (struct pci_data *)((u8 *)run_rom
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2019-07-16 21:14:09 +02:00
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+ read_le16(&run_rom->data));
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2017-04-20 02:31:07 +02:00
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if (read_le32(&rom_data->signature) == PCI_DATA_HDR
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&& read_le16(&rom_data->device) == dev->device
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&& read_le16(&rom_data->vendor) == dev->vendor)
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return run_rom;
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else
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return NULL;
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}
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2016-03-31 20:04:23 +02:00
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static unsigned long
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2019-10-21 11:57:19 +02:00
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pci_rom_acpi_fill_vfct(struct device *device, acpi_vfct_t *vfct_struct,
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2018-05-06 20:32:23 +02:00
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unsigned long current)
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2016-03-31 20:04:23 +02:00
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{
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2019-10-21 07:53:20 +02:00
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acpi_vfct_image_hdr_t *header = &vfct_struct->image_hdr;
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2016-03-31 20:04:23 +02:00
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struct rom_header *rom;
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2017-04-20 02:31:07 +02:00
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rom = check_initialized(device);
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if (!rom)
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rom = pci_rom_probe(device);
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2016-03-31 20:04:23 +02:00
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if (!rom) {
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printk(BIOS_ERR, "pci_rom_acpi_fill_vfct failed\n");
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return current;
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}
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2017-04-20 02:31:07 +02:00
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printk(BIOS_DEBUG, " Copying %sVBIOS image from %p\n",
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rom == (struct rom_header *)
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(uintptr_t)PCI_VGA_RAM_IMAGE_START ?
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"initialized " : "",
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rom);
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2016-03-31 20:04:23 +02:00
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header->DeviceID = device->device;
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header->VendorID = device->vendor;
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header->PCIBus = device->bus->secondary;
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header->PCIFunction = PCI_FUNC(device->path.pci.devfn);
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header->PCIDevice = PCI_SLOT(device->path.pci.devfn);
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header->ImageLength = rom->size * 512;
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memcpy((void *)&header->VbiosContent, rom, header->ImageLength);
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2019-06-30 05:29:52 +02:00
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vfct_struct->VBIOSImageOffset = (size_t)header - (size_t)vfct_struct;
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2016-03-31 20:04:23 +02:00
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current += header->ImageLength;
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return current;
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}
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unsigned long
|
2018-05-06 20:32:23 +02:00
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pci_rom_write_acpi_tables(struct device *device, unsigned long current,
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struct acpi_rsdp *rsdp)
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2016-03-31 20:04:23 +02:00
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{
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/* Only handle VGA devices */
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if ((device->class >> 8) != PCI_CLASS_DISPLAY_VGA)
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return current;
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/* Only handle enabled devices */
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if (!device->enabled)
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return current;
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/* AMD/ATI uses VFCT */
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if (device->vendor == PCI_VENDOR_ID_ATI) {
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2019-10-21 11:57:19 +02:00
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acpi_vfct_t *vfct;
|
2019-06-30 05:29:52 +02:00
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2019-06-20 14:35:44 +02:00
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|
current = ALIGN_UP(current, 8);
|
2019-10-21 11:57:19 +02:00
|
|
|
vfct = (acpi_vfct_t *)current;
|
2016-03-31 20:04:23 +02:00
|
|
|
acpi_create_vfct(device, vfct, pci_rom_acpi_fill_vfct);
|
2019-06-30 05:29:52 +02:00
|
|
|
if (vfct->header.length) {
|
|
|
|
printk(BIOS_DEBUG, "ACPI: * VFCT at %lx\n", current);
|
|
|
|
current += vfct->header.length;
|
|
|
|
acpi_add_table(rsdp, vfct);
|
|
|
|
}
|
2016-03-31 20:04:23 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return current;
|
|
|
|
}
|
2017-06-06 19:30:55 +02:00
|
|
|
|
|
|
|
void pci_rom_ssdt(struct device *device)
|
|
|
|
{
|
|
|
|
static size_t ngfx;
|
|
|
|
|
|
|
|
/* Only handle VGA devices */
|
|
|
|
if ((device->class >> 8) != PCI_CLASS_DISPLAY_VGA)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Only handle enabled devices */
|
|
|
|
if (!device->enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Probe for option rom */
|
|
|
|
const struct rom_header *rom = pci_rom_probe(device);
|
|
|
|
if (!rom || !rom->size) {
|
|
|
|
printk(BIOS_WARNING, "%s: Missing PCI Option ROM\n",
|
|
|
|
dev_path(device));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
const char *scope = acpi_device_path(device);
|
|
|
|
if (!scope) {
|
|
|
|
printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Supports up to four devices. */
|
|
|
|
if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {
|
|
|
|
printk(BIOS_ERR, "%s: Out of CBMEM IDs.\n", dev_path(device));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Prepare memory */
|
|
|
|
const size_t cbrom_length = rom->size * 512;
|
|
|
|
if (!cbrom_length) {
|
|
|
|
printk(BIOS_ERR, "%s: ROM has zero length!\n",
|
|
|
|
dev_path(device));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void *cbrom = cbmem_add(CBMEM_ID_ROM0 + ngfx, cbrom_length);
|
|
|
|
if (!cbrom) {
|
|
|
|
printk(BIOS_ERR, "%s: Failed to allocate CBMEM.\n",
|
|
|
|
dev_path(device));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/* Increment CBMEM id for next device */
|
|
|
|
ngfx++;
|
|
|
|
|
|
|
|
memcpy(cbrom, rom, cbrom_length);
|
|
|
|
|
|
|
|
/* write _ROM method */
|
|
|
|
acpigen_write_scope(scope);
|
|
|
|
acpigen_write_rom(cbrom, cbrom_length);
|
|
|
|
acpigen_pop_len(); /* pop scope */
|
|
|
|
}
|
2016-03-31 20:04:23 +02:00
|
|
|
#endif
|