2009-08-12 17:00:51 +02:00
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chip northbridge/intel/i3100
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device pci_domain 0 on
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2011-03-01 20:58:47 +01:00
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subsystemid 0x8086 0x2680 inherit
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2009-08-12 17:00:51 +02:00
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device pci 00.0 on end # IMCH
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device pci 00.1 on end # IMCH error status
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device pci 01.0 on end # IMCH EDMA engine
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device pci 02.0 on end # PCIe port A/A0
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device pci 03.0 on end # PCIe port A1
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chip southbridge/intel/i3100
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# PIRQ line -> legacy IRQ mappings
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register "pirq_a_d" = "0x0b070a05"
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register "pirq_e_h" = "0x0a808080"
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device pci 1c.0 on end # PCIe port B0
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device pci 1c.1 on end # PCIe port B1
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device pci 1c.2 on end # PCIe port B2
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device pci 1c.3 on end # PCIe port B3
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device pci 1d.0 on end # USB (UHCI) 1
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device pci 1d.1 on end # USB (UHCI) 2
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device pci 1d.7 on end # USB (EHCI)
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device pci 1e.0 on end # PCI bridge
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device pci 1e.2 on end # audio
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device pci 1e.3 on end # modem
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device pci 1f.0 on # LPC bridge
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chip superio/intel/i3100
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device pnp 4e.4 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 4e.5 on # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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end
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end
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device pci 1f.2 on end # SATA
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device pci 1f.3 on end # SMBus
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end
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end
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2010-05-05 15:12:42 +02:00
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device lapic_cluster 0 on
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2009-08-12 17:00:51 +02:00
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chip cpu/intel/socket_mPGA479M
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2010-05-05 15:12:42 +02:00
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device lapic 0 on end
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2009-08-12 17:00:51 +02:00
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end
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end
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end
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