2013-10-04 23:00:07 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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Remove address from GPLv2 headers
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-03-26 15:17:45 +01:00
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* Foundation, Inc.
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2013-10-04 23:00:07 +02:00
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*/
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#include <string.h>
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2014-04-28 22:41:06 +02:00
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#include <bootmode.h>
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2013-10-04 23:00:07 +02:00
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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2014-10-08 01:42:17 +02:00
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#include <soc/gpio.h>
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2013-10-04 23:00:07 +02:00
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2013-10-28 17:24:53 +01:00
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#if CONFIG_EC_GOOGLE_CHROMEEC
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#include "ec.h"
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#include <ec/google/chromeec/ec.h>
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#endif
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/* The WP status pin lives on GPIO_SSUS_6 which is pad 36 in the SUS well. */
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#define WP_STATUS_PAD 36
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2013-10-04 23:00:07 +02:00
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#ifndef __PRE_RAM__
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#include <boot/coreboot_tables.h>
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#define GPIO_COUNT 6
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2013-10-28 17:24:53 +01:00
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static int get_lid_switch(void)
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{
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#if CONFIG_EC_GOOGLE_CHROMEEC
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u8 ec_switches = inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SWITCHES);
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return !!(ec_switches & EC_SWITCH_LID_OPEN);
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#else
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/* Default to force open. */
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return 1;
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#endif
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}
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2013-10-04 23:00:07 +02:00
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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struct lb_gpio *gpio;
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gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
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gpios->count = GPIO_COUNT;
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gpio = gpios->gpios;
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2013-10-28 17:24:53 +01:00
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fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "write protect",
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get_write_protect_state());
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fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "recovery",
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2014-05-01 00:56:13 +02:00
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recovery_mode_enabled());
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2013-10-28 17:24:53 +01:00
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fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "developer",
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get_developer_mode_switch());
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fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "lid", get_lid_switch());
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fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "power", 0);
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2013-11-28 15:44:51 +01:00
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fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "oprom", gfx_get_init_done());
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2013-10-04 23:00:07 +02:00
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}
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#endif
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int get_developer_mode_switch(void)
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{
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2013-10-28 17:24:53 +01:00
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return 0;
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2013-10-04 23:00:07 +02:00
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}
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int get_recovery_mode_switch(void)
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{
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2013-10-28 17:24:53 +01:00
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#if CONFIG_EC_GOOGLE_CHROMEEC
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u8 ec_switches = inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SWITCHES);
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u32 ec_events;
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/* If a switch is set, we don't need to look at events. */
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if (ec_switches & (EC_SWITCH_DEDICATED_RECOVERY))
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return 1;
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/* Else check if the EC has posted the keyboard recovery event. */
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ec_events = google_chromeec_get_events_b();
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return !!(ec_events &
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
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#else
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return 0;
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#endif
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2013-10-04 23:00:07 +02:00
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}
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2014-05-01 00:56:13 +02:00
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int clear_recovery_mode_switch(void)
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{
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#if CONFIG_EC_GOOGLE_CHROMEEC
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const uint32_t kb_rec_mask =
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY);
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/* Unconditionally clear the EC recovery request. */
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return google_chromeec_clear_events_b(kb_rec_mask);
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#else
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return 0;
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#endif
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}
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2013-10-04 23:00:07 +02:00
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int get_write_protect_state(void)
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{
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2014-02-05 21:55:26 +01:00
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/*
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* The vboot loader queries this function in romstage. The GPIOs have
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* not been set up yet as that configuration is done in ramstage. The
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* hardware defaults to an input but there is a 20K pulldown. Externally
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* there is a 10K pullup. Disable the internal pull in romstage so that
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* there isn't any ambiguity in the reading.
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*/
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#if defined(__PRE_RAM__)
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ssus_disable_internal_pull(WP_STATUS_PAD);
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#endif
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2013-10-28 17:24:53 +01:00
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/* WP is enabled when the pin is reading high. */
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return ssus_get_gpio(WP_STATUS_PAD);
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2013-10-04 23:00:07 +02:00
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}
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